iwlwifi: yoyo: remove DBGI_SRAM address reset writing

[ Upstream commit ce014c9861544bb4e789323d0d8956a5ad262e25 ]

Due to preg protection we cannot write to this register
while FW is running (when FW in Halt it is ok).
since we have some cases that we need to dump this
region while FW is running remove this writing from DRV.
FW will do this writing.

Signed-off-by: Rotem Saado <rotem.saado@intel.com>
Fixes: 89639e06d0f3 ("iwlwifi: yoyo: support for new DBGI_SRAM region")
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
Link: https://lore.kernel.org/r/iwlwifi.20220129105618.209f3078bc74.I463530bd2f40daedb39f6d9df987bb7cee209033@changeid
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/net/wireless/intel/iwlwifi/fw/dbg.c b/drivers/net/wireless/intel/iwlwifi/fw/dbg.c
index 7ad9cee925da53cba8b36be1cfd0dddda85e483b..372cc950cc8845ebeadec729c583e929f3734fb7 100644 (file)
--- a/drivers/net/wireless/intel/iwlwifi/fw/dbg.c
+++ b/drivers/net/wireless/intel/iwlwifi/fw/dbg.c
@@ -1561,8 +1561,6 @@ iwl_dump_ini_dbgi_sram_iter(struct iwl_fw_runtime *fwrt,
                return -EBUSY;
 
        range->range_data_size = reg->dev_addr.size;
-       iwl_write_prph_no_grab(fwrt->trans, DBGI_SRAM_TARGET_ACCESS_CFG,
-                              DBGI_SRAM_TARGET_ACCESS_CFG_RESET_ADDRESS_MSK);
        for (i = 0; i < (le32_to_cpu(reg->dev_addr.size) / 4); i++) {
                prph_data = iwl_read_prph_no_grab(fwrt->trans, (i % 2) ?
                                          DBGI_SRAM_TARGET_ACCESS_RDATA_MSB :

diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-prph.h b/drivers/net/wireless/intel/iwlwifi/iwl-prph.h
index 95b3dae7b504b52e488b2ab000a816eabf8ec8e5..9331a6b6bf36c8ab219aea71abc964c84fe2d4fa 100644 (file)
--- a/drivers/net/wireless/intel/iwlwifi/iwl-prph.h
+++ b/drivers/net/wireless/intel/iwlwifi/iwl-prph.h
@@ -354,8 +354,6 @@
 #define WFPM_GP2                       0xA030B4
 
 /* DBGI SRAM Register details */
-#define DBGI_SRAM_TARGET_ACCESS_CFG                    0x00A2E14C
-#define DBGI_SRAM_TARGET_ACCESS_CFG_RESET_ADDRESS_MSK  0x10000
 #define DBGI_SRAM_TARGET_ACCESS_RDATA_LSB              0x00A2E154
 #define DBGI_SRAM_TARGET_ACCESS_RDATA_MSB              0x00A2E158