IB/mlx5: Set and get correct qp_num for a DCT QP

When a DCT QP is created on an active lag, it's dctc.port is assigned
in a round-robin way, which is from 1 to dev->lag_port. In this case
when querying this QP, we may get qp_attr.port_num > 2.
Fix this by setting qp->port when modifying a DCT QP, and read port_num
from qp->port instead of dctc.port when querying it.

Fixes: 7c4b1ab9f167 ("IB/mlx5: Add DCT RoCE LAG support")
Signed-off-by: Mark Zhang <markzhang@nvidia.com>
Reviewed-by: Maher Sanalla <msanalla@nvidia.com>
Link: https://patch.msgid.link/94c76bf0adbea997f87ffa27674e0a7118ad92a9.1737290358.git.leon@kernel.org
Signed-off-by: Leon Romanovsky <leon@kernel.org>

diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c
index a43eba9d3572ceb53cb636fdf8e4c5cff6842e58..08d22db8dca9109118eeb4a9c2d4a8b15e31f2b8 100644 (file)
--- a/drivers/infiniband/hw/mlx5/qp.c
+++ b/drivers/infiniband/hw/mlx5/qp.c
@@ -4579,6 +4579,8 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
 
                set_id = mlx5_ib_get_counters_id(dev, attr->port_num - 1);
                MLX5_SET(dctc, dctc, counter_set_id, set_id);
+
+               qp->port = attr->port_num;
        } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) {
                struct mlx5_ib_modify_qp_resp resp = {};
                u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {};
@@ -5074,7 +5076,7 @@ static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp,
        }
 
        if (qp_attr_mask & IB_QP_PORT)
-               qp_attr->port_num = MLX5_GET(dctc, dctc, port);
+               qp_attr->port_num = mqp->port;
        if (qp_attr_mask & IB_QP_MIN_RNR_TIMER)
                qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak);
        if (qp_attr_mask & IB_QP_AV) {