Commit
3f61a38 introduced a regression where the ISA string was no
longer detected based on the ELF header. The mechanism was changed from
directly referencing `abfd` to using `disassembler_info->section`, which
was not properly initialized for RISC-V.
The previous implementation ignored the object in scope, leading to
issues such as failing to decode RVV instructions when a library was
compiled as `rv64gcv` and the main application as `rv64gc`.
This patch resolves both problems by initializing
`disassembler_info->section` with the object currently in scope,
ensuring correct ISA string detection during disassembly.
Approved-By: Andrew Burgess <aburgess@redhat.com>
return "riscv(32|64)?";
}
+/* Implement the "print_insn" gdbarch method. */
+
+static int
+riscv_print_insn (bfd_vma addr, struct disassemble_info *info)
+{
+ /* Initialize the BFD section to enable ISA string detection depending on the
+ object in scope. */
+ struct obj_section *s = find_pc_section (addr);
+ if (s != nullptr)
+ info->section = s->the_bfd_section;
+
+ return default_print_insn (addr, info);
+}
+
/* Implementation of `gdbarch_stap_is_single_operand', as defined in
gdbarch.h. */
disassembler_options_riscv ());
set_gdbarch_disassembler_options (gdbarch, &riscv_disassembler_options);
+ /* Disassembler print_insn. */
+ set_gdbarch_print_insn (gdbarch, riscv_print_insn);
+
/* SystemTap Support. */
set_gdbarch_stap_is_single_operand (gdbarch, riscv_stap_is_single_operand);
set_gdbarch_stap_register_indirection_prefixes