]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: imx8qxp-mek: Add PCIe support
authorFrank Li <Frank.Li@nxp.com>
Mon, 21 Oct 2024 19:06:01 +0000 (15:06 -0400)
committerShawn Guo <shawnguo@kernel.org>
Tue, 22 Oct 2024 03:35:48 +0000 (11:35 +0800)
Add PCIe support for i.MX8QXP MEK board.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts

index 936ba5ecdcac76fd03bb9b9c79cd928d31cb3338..facabd8478bbfc5fd2841dd5e4bf830e83ec69ec 100644 (file)
                };
        };
 
+       reg_pcieb: regulator-pcie {
+               compatible = "regulator-fixed";
+               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <3300000>;
+               regulator-name = "mpcie_3v3";
+               gpio = <&pca9557_a 2 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
        sound-wm8960 {
                compatible = "fsl,imx-audio-wm8960";
                model = "wm8960-audio";
        status = "okay";
 };
 
+&hsio_phy {
+       fsl,hsio-cfg = "pciea-x2-pcieb";
+       fsl,refclk-pad-mode = "input";
+       status = "okay";
+};
+
 &lpuart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_lpuart0>;
        status = "okay";
 };
 
+&pcieb {
+       phys = <&hsio_phy 0 PHY_TYPE_PCIE 0>;
+       phy-names = "pcie-phy";
+       pinctrl-0 = <&pinctrl_pcieb>;
+       pinctrl-names = "default";
+       reset-gpios = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
+       vpcie-supply = <&reg_pcieb>;
+       status = "okay";
+};
+
 &scu_key {
        status = "okay";
 };
                >;
        };
 
+       pinctrl_pcieb: pcieagrp {
+               fsl,pins = <
+                       IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00              0x06000021
+                       IMX8QXP_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_CLKREQ_B         0x06000021
+                       IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02               0x04000021
+               >;
+       };
+
        pinctrl_typec: typecgrp {
                fsl,pins = <
                        IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03                        0x06000021