--- /dev/null
+From 5e3fe67e02c53e5a5fcf0e2b0d91dd93f757d50b Mon Sep 17 00:00:00 2001
+From: Andre Przywara <andre.przywara@amd.com>
+Date: Wed, 31 Oct 2012 17:20:50 +0100
+Subject: Revert "x86, amd: Disable way access filter on Piledriver CPUs" it is duplicated
+
+Revert 5e3fe67e02c53e5a5fcf0e2b0d91dd93f757d50b which is
+commit 2bbf0a1427c377350f001fbc6260995334739ad7 upstream.
+
+Willy pointed out that I messed up and applied this one twice to the
+3.0-stable tree, so revert the second instance of it.
+
+Reported by: Willy Tarreau <w@1wt.eu>
+Cc: Andre Przywara <osp@andrep.de>
+Cc: H. Peter Anvin <hpa@linux.intel.com>
+Cc: CAI Qian <caiqian@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+reverted:
+---
+ arch/x86/kernel/cpu/amd.c | 14 --------------
+ 1 file changed, 14 deletions(-)
+
+--- a/arch/x86/kernel/cpu/amd.c
++++ b/arch/x86/kernel/cpu/amd.c
+@@ -568,20 +568,6 @@ static void __cpuinit init_amd(struct cp
+ }
+ }
+
+- /*
+- * The way access filter has a performance penalty on some workloads.
+- * Disable it on the affected CPUs.
+- */
+- if ((c->x86 == 0x15) &&
+- (c->x86_model >= 0x02) && (c->x86_model < 0x20)) {
+- u64 val;
+-
+- if (!rdmsrl_safe(0xc0011021, &val) && !(val & 0x1E)) {
+- val |= 0x1E;
+- checking_wrmsrl(0xc0011021, val);
+- }
+- }
+-
+ cpu_detect_cache_sizes(c);
+
+ /* Multi core CPU? */