.max_register = SZ_4K,
};
struct device *dev = &pdev->dev;
- struct device_node *pgc_np, *np;
+ struct device_node *pgc_np;
struct regmap *regmap;
void __iomem *base;
int ret;
return ret;
}
- for_each_child_of_node(pgc_np, np) {
+ for_each_child_of_node_scoped(pgc_np, np) {
struct platform_device *pd_pdev;
struct imx_pgc_domain *domain;
u32 domain_index;
ret = of_property_read_u32(np, "reg", &domain_index);
if (ret) {
dev_err(dev, "Failed to read 'reg' property\n");
- of_node_put(np);
return ret;
}
domain_index);
if (!pd_pdev) {
dev_err(dev, "Failed to allocate platform device\n");
- of_node_put(np);
return -ENOMEM;
}
sizeof(domain_data->domains[domain_index]));
if (ret) {
platform_device_put(pd_pdev);
- of_node_put(np);
return ret;
}
ret = platform_device_add(pd_pdev);
if (ret) {
platform_device_put(pd_pdev);
- of_node_put(np);
return ret;
}
}