]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
pinctrl: renesas: rzg2l: Move RZG2L_SINGLE_PIN definition to top of the file
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tue, 18 Jun 2024 17:48:30 +0000 (18:48 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 24 Jun 2024 13:56:30 +0000 (15:56 +0200)
Define `RZG2L_SINGLE_PIN` at the top of the file to clarify its use for
dedicated pins for improved readability.

While at it update the comment for `RZG2L_SINGLE_PIN_PACK` macro and place
it just above the macro for clarity.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/r/20240618174831.415583-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/renesas/pinctrl-rzg2l.c

index b79dd1ea2616304f2e225610b0fe8b210c1d92c6..37a99d33400dba5dc0c6bf0b0a391c73b6f96c0e 100644 (file)
@@ -64,6 +64,8 @@
 #define PIN_CFG_ELC                    BIT(20)
 #define PIN_CFG_IOLH_RZV2H             BIT(21)
 
+#define RZG2L_SINGLE_PIN               BIT_ULL(63)     /* Dedicated pin */
+
 #define RZG2L_MPXED_COMMON_PIN_FUNCS(group) \
                                        (PIN_CFG_IOLH_##group | \
                                         PIN_CFG_PUPD | \
  */
 #define RZG2L_GPIO_PORT_PACK(n, a, f)  RZG2L_GPIO_PORT_SPARSE_PACK((1ULL << (n)) - 1, (a), (f))
 
-/*
- * BIT(63) indicates dedicated pin, p is the register index while
- * referencing to SR/IEN/IOLH/FILxx registers, b is the register bits
- * (b * 8) and f is the pin configuration capabilities supported.
- */
-#define RZG2L_SINGLE_PIN               BIT_ULL(63)
 #define RZG2L_SINGLE_PIN_INDEX_MASK    GENMASK_ULL(62, 56)
 #define RZG2L_SINGLE_PIN_BITS_MASK     GENMASK_ULL(55, 53)
-
+/*
+ * p is the register index while referencing to SR/IEN/IOLH/FILxx
+ * registers, b is the register bits (b * 8) and f is the pin
+ * configuration capabilities supported.
+ */
 #define RZG2L_SINGLE_PIN_PACK(p, b, f) (RZG2L_SINGLE_PIN | \
                                         FIELD_PREP_CONST(RZG2L_SINGLE_PIN_INDEX_MASK, (p)) | \
                                         FIELD_PREP_CONST(RZG2L_SINGLE_PIN_BITS_MASK, (b)) | \