drm/amd/display: Do Not Consider DSC if Valid Config Not Found

[why]
In the mode validation, mst dsc is considered for bw calculation after
common dsc config is determined. Currently it considered common dsc config
is found if max and min target bpp are non zero which is not accurate. Invalid
max and min target bpp values would not get max_kbps and min_kbps calculated,
leading to falsefully pass a mode that does not have valid dsc parameters
available.

[how]
Use the return value of decide_dsc_bandwidth_range() to determine whether valid
dsc common config is found or not. Prune out modes that do not have valid common
dsc config determined.

Reviewed-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 7ceedf626d23fe59c1b97392fa26bf8a70bb0b68..d8dcfb3efaaa6d618f262d8986f1319cbf6989f6 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -1713,16 +1713,17 @@ static bool is_dsc_common_config_possible(struct dc_stream_state *stream,
                                          struct dc_dsc_bw_range *bw_range)
 {
        struct dc_dsc_policy dsc_policy = {0};
+       bool is_dsc_possible;
 
        dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy, dc_link_get_highest_encoding_format(stream->link));
-       dc_dsc_compute_bandwidth_range(stream->sink->ctx->dc->res_pool->dscs[0],
-                                      stream->sink->ctx->dc->debug.dsc_min_slice_height_override,
-                                      dsc_policy.min_target_bpp * 16,
-                                      dsc_policy.max_target_bpp * 16,
-                                      &stream->sink->dsc_caps.dsc_dec_caps,
-                                      &stream->timing, dc_link_get_highest_encoding_format(stream->link), bw_range);
-
-       return bw_range->max_target_bpp_x16 && bw_range->min_target_bpp_x16;
+       is_dsc_possible = dc_dsc_compute_bandwidth_range(stream->sink->ctx->dc->res_pool->dscs[0],
+                                                        stream->sink->ctx->dc->debug.dsc_min_slice_height_override,
+                                                        dsc_policy.min_target_bpp * 16,
+                                                        dsc_policy.max_target_bpp * 16,
+                                                        &stream->sink->dsc_caps.dsc_dec_caps,
+                                                        &stream->timing, dc_link_get_highest_encoding_format(stream->link), bw_range);
+
+       return is_dsc_possible;
 }
 #endif