riscv: image: Add new image type for RV64

Similar to ARM and X86, introduce a new image type which allows u-boot
to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Maxim Moskalets <maximmosk4@gmail.com>

diff --git a/boot/image.c b/boot/image.c
index 139c5bd035a9028801f96976133e589714f23485..45299a7dc337db878a943810d10ccda035bb9b47 100644 (file)
--- a/boot/image.c
+++ b/boot/image.c
@@ -92,7 +92,8 @@ static const table_entry_t uimage_arch[] = {
        {       IH_ARCH_ARC,            "arc",          "ARC",          },
        {       IH_ARCH_X86_64,         "x86_64",       "AMD x86_64",   },
        {       IH_ARCH_XTENSA,         "xtensa",       "Xtensa",       },
-       {       IH_ARCH_RISCV,          "riscv",        "RISC-V",       },
+       {       IH_ARCH_RISCV,          "riscv",        "RISC-V 32 Bit",},
+       {       IH_ARCH_RISCV64,        "riscv64",      "RISC-V 64 Bit",},
        {       -1,                     "",             "",             },
 };
 

diff --git a/include/image.h b/include/image.h
index c1db8383459c9d7ce1ecc318ccccb4627a7066e5..4620782c069e757713fea77f72f6ce3a72314311 100644 (file)
--- a/include/image.h
+++ b/include/image.h
@@ -138,7 +138,8 @@ enum {
        IH_ARCH_ARC,                    /* Synopsys DesignWare ARC */
        IH_ARCH_X86_64,                 /* AMD x86_64, Intel and Via */
        IH_ARCH_XTENSA,                 /* Xtensa       */
-       IH_ARCH_RISCV,                  /* RISC-V */
+       IH_ARCH_RISCV,                  /* RISC-V 32 bit*/
+       IH_ARCH_RISCV64,                /* RISC-V 64 bit*/
 
        IH_ARCH_COUNT,
 };