[AArch64] Add ifunc support for Ares

Add Ares to the midr_el0 list and support ifunc dispatch.  Since Ares
supports 2 128-bit loads/stores, use Neon registers for memcpy by
selecting __memcpy_falkor by default (we should rename this to
__memcpy_simd or similar).

	* manual/tunables.texi (glibc.cpu.name): Add ares tunable.
	* sysdeps/aarch64/multiarch/memcpy.c (__libc_memcpy): Use
	__memcpy_falkor for ares.
	* sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_ARES):
	Add new define.
	* sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list):
	Add ares cpu.

(cherry picked from commit 02f440c1ef5d5d79552a524065aa3e2fabe469b9)

diff --git a/ChangeLog b/ChangeLog
index 93f9e6e885cbadc52b569238680dffceca11c778..cb52249843b51009140accb49a874183aa016451 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,13 @@
+2019-09-06  Wilco Dijkstra  <wdijkstr@arm.com>
+
+       * manual/tunables.texi (glibc.cpu.name): Add ares tunable.
+       * sysdeps/aarch64/multiarch/memcpy.c (__libc_memcpy): Use
+       __memcpy_falkor for ares.
+       * sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_ARES):
+       Add new define.
+       * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list):
+       Add ares cpu.
+
 2019-07-12  Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 
        [BZ #24699]

diff --git a/manual/tunables.texi b/manual/tunables.texi
index 9dccf2ee7f8eec17ca00493c2dcfd996acb533ab..d8c22dd29f019d126e7cdc31f3e23038d9250bd7 100644 (file)
--- a/manual/tunables.texi
+++ b/manual/tunables.texi
@@ -333,7 +333,7 @@ This tunable is specific to powerpc, powerpc64 and powerpc64le.
 The @code{glibc.tune.cpu=xxx} tunable allows the user to tell @theglibc{} to
 assume that the CPU is @code{xxx} where xxx may have one of these values:
 @code{generic}, @code{falkor}, @code{thunderxt88}, @code{thunderx2t99},
-@code{thunderx2t99p1}.
+@code{thunderx2t99p1}, @code{ares}.
 
 This tunable is specific to aarch64.
 @end deftp

diff --git a/sysdeps/aarch64/multiarch/memcpy.c b/sysdeps/aarch64/multiarch/memcpy.c
index 4a04a63b0fe0c84b9225286c4aaf1386d01a736a..8f5d4e7df51af09c88b3c4c4d2a0a0f477ce405e 100644 (file)
--- a/sysdeps/aarch64/multiarch/memcpy.c
+++ b/sysdeps/aarch64/multiarch/memcpy.c
@@ -36,7 +36,7 @@ extern __typeof (__redirect_memcpy) __memcpy_falkor attribute_hidden;
 libc_ifunc (__libc_memcpy,
             (IS_THUNDERX (midr)
             ? __memcpy_thunderx
-            : (IS_FALKOR (midr) || IS_PHECDA (midr)
+            : (IS_FALKOR (midr) || IS_PHECDA (midr) || IS_ARES (midr)
                ? __memcpy_falkor
                : (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr)
                  ? __memcpy_thunderx2

diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
index 39eba0186f55b5de72c325d26a58dda32cce8330..56076849ca54ace2d9b63b2b4a4745d3d17c35d1 100644 (file)
--- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
+++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c
@@ -36,6 +36,7 @@ static struct cpu_list cpu_list[] = {
       {"thunderx2t99",   0x431F0AF0},
       {"thunderx2t99p1", 0x420F5160},
       {"phecda",        0x680F0000},
+      {"ares",          0x411FD0C0},
       {"generic",       0x0}
 };
 

diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
index eb35adfbe9d429d5622a712738fa75bafe8e7322..153d258afe975ab463580cba4248a6950126c89a 100644 (file)
--- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
+++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h
@@ -51,6 +51,8 @@
 
 #define IS_PHECDA(midr) (MIDR_IMPLEMENTOR(midr) == 'h'                       \
                         && MIDR_PARTNUM(midr) == 0x000)
+#define IS_ARES(midr) (MIDR_IMPLEMENTOR(midr) == 'A'                         \
+                       && MIDR_PARTNUM(midr) == 0xd0c)
 
 struct cpu_features
 {