drm/i915/psr: add LATENCY_REPORTING_REMOVED() register bit helper

Drop the wa_16013835468_bit_get() function in favour of the register
macro. It doesn't have to be so complicated, and we don't have to use
the workaround name in everything that's related to it.

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/22934fee1ea37c777c35e4b520d5f11b6cd953d0.1730201504.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ed5b4d110fbacb663d3b4d608fa20e7ebc0b96b0..6b7b154e67b509414b5f6c8c3165d34c239b37e6 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1772,23 +1772,6 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
        intel_dp->psr.active = true;
 }
 
-static u32 wa_16013835468_bit_get(struct intel_dp *intel_dp)
-{
-       switch (intel_dp->psr.pipe) {
-       case PIPE_A:
-               return LATENCY_REPORTING_REMOVED_PIPE_A;
-       case PIPE_B:
-               return LATENCY_REPORTING_REMOVED_PIPE_B;
-       case PIPE_C:
-               return LATENCY_REPORTING_REMOVED_PIPE_C;
-       case PIPE_D:
-               return LATENCY_REPORTING_REMOVED_PIPE_D;
-       default:
-               MISSING_CASE(intel_dp->psr.pipe);
-               return 0;
-       }
-}
-
 /*
  * Wa_16013835468
  * Wa_14015648006
@@ -1797,6 +1780,7 @@ static void wm_optimization_wa(struct intel_dp *intel_dp,
                               const struct intel_crtc_state *crtc_state)
 {
        struct intel_display *display = to_intel_display(intel_dp);
+       enum pipe pipe = intel_dp->psr.pipe;
        bool set_wa_bit = false;
 
        /* Wa_14015648006 */
@@ -1810,10 +1794,10 @@ static void wm_optimization_wa(struct intel_dp *intel_dp,
 
        if (set_wa_bit)
                intel_de_rmw(display, GEN8_CHICKEN_DCPR_1,
-                            0, wa_16013835468_bit_get(intel_dp));
+                            0, LATENCY_REPORTING_REMOVED(pipe));
        else
                intel_de_rmw(display, GEN8_CHICKEN_DCPR_1,
-                            wa_16013835468_bit_get(intel_dp), 0);
+                            LATENCY_REPORTING_REMOVED(pipe), 0);
 }
 
 static void intel_psr_enable_source(struct intel_dp *intel_dp,
@@ -2113,7 +2097,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
         */
        if (DISPLAY_VER(display) >= 11)
                intel_de_rmw(display, GEN8_CHICKEN_DCPR_1,
-                            wa_16013835468_bit_get(intel_dp), 0);
+                            LATENCY_REPORTING_REMOVED(intel_dp->psr.pipe), 0);
 
        if (intel_dp->psr.sel_update_enabled) {
                /* Wa_16012604467:adlp,mtl[a0,b0] */

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c160e087972aba4aa3f9d1f5ff1d9667d29eaf45..6b9d8d2cb72220da628bd704318c7e012750c705 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2863,11 +2863,16 @@
 #define  RESET_PCH_HANDSHAKE_ENABLE    REG_BIT(4)
 
 #define GEN8_CHICKEN_DCPR_1                    _MMIO(0x46430)
-#define   LATENCY_REPORTING_REMOVED_PIPE_D     REG_BIT(31)
+#define   _LATENCY_REPORTING_REMOVED_PIPE_D    REG_BIT(31)
 #define   SKL_SELECT_ALTERNATE_DC_EXIT         REG_BIT(30)
-#define   LATENCY_REPORTING_REMOVED_PIPE_C     REG_BIT(25)
-#define   LATENCY_REPORTING_REMOVED_PIPE_B     REG_BIT(24)
-#define   LATENCY_REPORTING_REMOVED_PIPE_A     REG_BIT(23)
+#define   _LATENCY_REPORTING_REMOVED_PIPE_C    REG_BIT(25)
+#define   _LATENCY_REPORTING_REMOVED_PIPE_B    REG_BIT(24)
+#define   _LATENCY_REPORTING_REMOVED_PIPE_A    REG_BIT(23)
+#define   LATENCY_REPORTING_REMOVED(pipe)      _PICK((pipe), \
+                                                     _LATENCY_REPORTING_REMOVED_PIPE_A, \
+                                                     _LATENCY_REPORTING_REMOVED_PIPE_B, \
+                                                     _LATENCY_REPORTING_REMOVED_PIPE_C, \
+                                                     _LATENCY_REPORTING_REMOVED_PIPE_D)
 #define   ICL_DELAY_PMRSP                      REG_BIT(22)
 #define   DISABLE_FLR_SRC                      REG_BIT(15)
 #define   MASK_WAKEMEM                         REG_BIT(13)