net: sh_eth: Convert cache operations to static functions

Turn the current cache operation macros into static functions to improve
compiler coverage checking. This does change the driver behavior slightly,
the driver now expects those cache operation functions to be available on
all architectures on which it is used. This should pose no problem, as the
driver is only used on 32bit and 64bit ARM, which both have those operations.
The CFG_SH_ETHER_ALIGNE_SIZE is converted to SH_ETHER_ALIGN_SIZE and defined
as either 64 on ARM or 16 on SH.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 9ccba153f363e3a5221a06282371a08847a10c16..d372ece8e463f0f0a43428d87d0a0337ccd29ef7 100644 (file)
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -33,31 +33,24 @@
 # error "Please define CFG_SH_ETHER_PHY_ADDR"
 #endif
 
-#if defined(CFG_SH_ETHER_CACHE_WRITEBACK) && \
-       !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
-#define flush_cache_wback(addr, len)    \
-               flush_dcache_range((unsigned long)addr, \
-               (unsigned long)(addr + ALIGN(len, CFG_SH_ETHER_ALIGNE_SIZE)))
-#else
-#define flush_cache_wback(...)
-#endif
+static void flush_cache_wback(void *addr, unsigned long len)
+{
+       flush_dcache_range((unsigned long)addr,
+                          (unsigned long)(addr + ALIGN(len, SH_ETHER_ALIGN_SIZE)));
+}
 
-#if defined(CFG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM)
-#define invalidate_cache(addr, len)            \
-       {       \
-               unsigned long line_size = CFG_SH_ETHER_ALIGNE_SIZE;     \
-               unsigned long start, end;       \
-               \
-               start = (unsigned long)addr;    \
-               end = start + len;              \
-               start &= ~(line_size - 1);      \
-               end = ((end + line_size - 1) & ~(line_size - 1));       \
-               \
-               invalidate_dcache_range(start, end);    \
-       }
-#else
-#define invalidate_cache(...)
-#endif
+static void invalidate_cache(void *addr, unsigned long len)
+{
+       unsigned long line_size = SH_ETHER_ALIGN_SIZE;
+       unsigned long start, end;
+
+       start = (unsigned long)addr;
+       end = start + len;
+       start &= ~(line_size - 1);
+       end = (end + line_size - 1) & ~(line_size - 1);
+
+       invalidate_dcache_range(start, end);
+}
 
 #define TIMEOUT_CNT 1000
 
@@ -133,7 +126,7 @@ static int sh_eth_recv_start(struct sh_eth_info *port_info)
 
 static void sh_eth_recv_finish(struct sh_eth_info *port_info)
 {
-       invalidate_cache(ADDR_TO_P2(port_info->rx_desc_cur->rd2), MAX_BUF_SIZE);
+       invalidate_cache((void *)ADDR_TO_P2((uintptr_t)port_info->rx_desc_cur->rd2), MAX_BUF_SIZE);
 
        /* Make current descriptor available again */
        if (port_info->rx_desc_cur->rd0 & RD_RDLE)

diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 6b7f8ae5154361dbc020ff10599854ee4ffca252..006f12a37b9e7d6a52c34d213ecae7ae6af92c5e 100644 (file)
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -19,20 +19,17 @@
 
 /* The ethernet controller needs to use physical addresses */
 #define ADDR_TO_PHY(addr)      ((uintptr_t)(addr) & ~0xe0000000)
+#define SH_ETHER_ALIGN_SIZE    16
 #elif defined(CONFIG_ARM)
 #ifndef inl
 #define inl    readl
 #define outl   writel
+#define SH_ETHER_ALIGN_SIZE    64
 #endif
 #define ADDR_TO_PHY(addr)      ((uintptr_t)(addr))
 #define ADDR_TO_P2(addr)       (addr)
 #endif /* defined(CONFIG_SH) */
 
-/* base padding size is 16 */
-#ifndef CFG_SH_ETHER_ALIGNE_SIZE
-#define CFG_SH_ETHER_ALIGNE_SIZE 16
-#endif
-
 /* Buffers must be big enough to hold the largest ethernet frame. Also, rx
    buffers must be a multiple of 32 bytes */
 #define MAX_BUF_SIZE   (48 * 32)
@@ -44,7 +41,7 @@
 
 /* The size of the tx descriptor is determined by how much padding is used.
    4, 20, or 52 bytes of padding can be used */
-#define TX_DESC_PADDING        (CFG_SH_ETHER_ALIGNE_SIZE - 12)
+#define TX_DESC_PADDING        (SH_ETHER_ALIGN_SIZE - 12)
 
 /* Tx descriptor. We always use 3 bytes of padding */
 struct tx_desc_s {
@@ -59,9 +56,9 @@ struct tx_desc_s {
 
 /* The size of the rx descriptor is determined by how much padding is used.
    4, 20, or 52 bytes of padding can be used */
-#define RX_DESC_PADDING        (CFG_SH_ETHER_ALIGNE_SIZE - 12)
+#define RX_DESC_PADDING        (SH_ETHER_ALIGN_SIZE - 12)
 /* aligned cache line size */
-#define RX_BUF_ALIGNE_SIZE     (CFG_SH_ETHER_ALIGNE_SIZE > 32 ? 64 : 32)
+#define RX_BUF_ALIGNE_SIZE     (SH_ETHER_ALIGN_SIZE > 32 ? 64 : 32)
 
 /* Rx descriptor. We always use 4 bytes of padding */
 struct rx_desc_s {
@@ -380,11 +377,11 @@ enum DMAC_M_BIT {
 #endif
 };
 
-#if CFG_SH_ETHER_ALIGNE_SIZE == 64
+#if SH_ETHER_ALIGN_SIZE == 64
 # define EMDR_DESC EDMR_DL1
-#elif CFG_SH_ETHER_ALIGNE_SIZE == 32
+#elif SH_ETHER_ALIGN_SIZE == 32
 # define EMDR_DESC EDMR_DL0
-#elif CFG_SH_ETHER_ALIGNE_SIZE == 16 /* Default */
+#elif SH_ETHER_ALIGN_SIZE == 16 /* Default */
 # define EMDR_DESC 0
 #endif