--- /dev/null
+From 85ce50d337d10a6fd328fa70b0a15543bf5c0f64 Mon Sep 17 00:00:00 2001
+From: Randy Dunlap <rdunlap@infradead.org>
+Date: Tue, 10 Nov 2020 09:57:46 -0800
+Subject: net: kcov: don't select SKB_EXTENSIONS when there is no NET
+
+From: Randy Dunlap <rdunlap@infradead.org>
+
+commit 85ce50d337d10a6fd328fa70b0a15543bf5c0f64 upstream.
+
+Fix kconfig warning when CONFIG_NET is not set/enabled:
+
+WARNING: unmet direct dependencies detected for SKB_EXTENSIONS
+ Depends on [n]: NET [=n]
+ Selected by [y]:
+ - KCOV [=y] && ARCH_HAS_KCOV [=y] && (CC_HAS_SANCOV_TRACE_PC [=y] || GCC_PLUGINS [=n])
+
+Fixes: 6370cc3bbd8a ("net: add kcov handle to skb extensions")
+Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
+Cc: Aleksandr Nogikh <nogikh@google.com>
+Cc: Willem de Bruijn <willemb@google.com>
+Link: https://lore.kernel.org/r/20201110175746.11437-1-rdunlap@infradead.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ lib/Kconfig.debug | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/lib/Kconfig.debug
++++ b/lib/Kconfig.debug
+@@ -1869,7 +1869,7 @@ config KCOV
+ depends on CC_HAS_SANCOV_TRACE_PC || GCC_PLUGINS
+ select DEBUG_FS
+ select GCC_PLUGIN_SANCOV if !CC_HAS_SANCOV_TRACE_PC
+- select SKB_EXTENSIONS
++ select SKB_EXTENSIONS if NET
+ help
+ KCOV exposes kernel code coverage information in a form suitable
+ for coverage-guided fuzzing (randomized testing).
--- /dev/null
+From 97f53a08cba128a724ebbbf34778d3553d559816 Mon Sep 17 00:00:00 2001
+From: Randy Dunlap <rdunlap@infradead.org>
+Date: Mon, 16 Nov 2020 13:21:08 -0800
+Subject: net: linux/skbuff.h: combine SKB_EXTENSIONS + KCOV handling
+
+From: Randy Dunlap <rdunlap@infradead.org>
+
+commit 97f53a08cba128a724ebbbf34778d3553d559816 upstream.
+
+The previous Kconfig patch led to some other build errors as
+reported by the 0day bot and my own overnight build testing.
+
+These are all in <linux/skbuff.h> when KCOV is enabled but
+SKB_EXTENSIONS is not enabled, so fix those by combining those conditions
+in the header file.
+
+Fixes: 6370cc3bbd8a ("net: add kcov handle to skb extensions")
+Fixes: 85ce50d337d1 ("net: kcov: don't select SKB_EXTENSIONS when there is no NET")
+Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
+Reported-by: kernel test robot <lkp@intel.com>
+Cc: Aleksandr Nogikh <nogikh@google.com>
+Cc: Willem de Bruijn <willemb@google.com>
+Acked-by: Florian Westphal <fw@strlen.de>
+Link: https://lore.kernel.org/r/20201116212108.32465-1-rdunlap@infradead.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ include/linux/skbuff.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/include/linux/skbuff.h
++++ b/include/linux/skbuff.h
+@@ -4608,7 +4608,7 @@ static inline void skb_reset_redirect(st
+ #endif
+ }
+
+-#ifdef CONFIG_KCOV
++#if IS_ENABLED(CONFIG_KCOV) && IS_ENABLED(CONFIG_SKB_EXTENSIONS)
+ static inline void skb_set_kcov_handle(struct sk_buff *skb,
+ const u64 kcov_handle)
+ {
+@@ -4636,7 +4636,7 @@ static inline u64 skb_get_kcov_handle(st
+ static inline void skb_set_kcov_handle(struct sk_buff *skb,
+ const u64 kcov_handle) { }
+ static inline u64 skb_get_kcov_handle(struct sk_buff *skb) { return 0; }
+-#endif /* CONFIG_KCOV */
++#endif /* CONFIG_KCOV && CONFIG_SKB_EXTENSIONS */
+
+ #endif /* __KERNEL__ */
+ #endif /* _LINUX_SKBUFF_H */
--- /dev/null
+From 2115d3d482656ea702f7cf308c0ded3500282903 Mon Sep 17 00:00:00 2001
+From: Hayes Wang <hayeswang@realtek.com>
+Date: Fri, 6 Aug 2021 17:15:55 +0800
+Subject: Revert "r8169: avoid link-up interrupt issue on RTL8106e if user enables ASPM"
+
+From: Hayes Wang <hayeswang@realtek.com>
+
+commit 2115d3d482656ea702f7cf308c0ded3500282903 upstream.
+
+This reverts commit 1ee8856de82faec9bc8bd0f2308a7f27e30ba207.
+
+This is used to re-enable ASPM on RTL8106e, if it is possible.
+
+Signed-off-by: Hayes Wang <hayeswang@realtek.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -3547,6 +3547,7 @@ static void rtl_hw_start_8106(struct rtl
+ rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000);
+
+ rtl_pcie_state_l2l3_disable(tp);
++ rtl_hw_aspm_clkreq_enable(tp, true);
+ }
+
+ DECLARE_RTL_COND(rtl_mac_ocp_e00e_cond)
--- /dev/null
+From 6f991850412963381017cfb0d691cbd4d6a551dc Mon Sep 17 00:00:00 2001
+From: Vignesh Raghavendra <vigneshr@ti.com>
+Date: Wed, 11 Nov 2020 16:56:53 +0530
+Subject: serial: 8250: 8250_omap: Fix unused variable warning
+
+From: Vignesh Raghavendra <vigneshr@ti.com>
+
+commit 6f991850412963381017cfb0d691cbd4d6a551dc upstream.
+
+With commit 439c7183e5b9 ("serial: 8250: 8250_omap: Disable RX interrupt after DMA enable"),
+below warning is seen with W=1 and CONFIG_SERIAL_8250_DMA is disabled:
+
+ drivers/tty/serial/8250/8250_omap.c:1199:42: warning: unused variable 'k3_soc_devices' [-Wunused-const-variable]
+
+Fix this by moving the code using k3_soc_devices array to
+omap_serial_fill_features_erratas() that handles other errata flags as
+well.
+
+Fixes: 439c7183e5b9 ("serial: 8250: 8250_omap: Disable RX interrupt after DMA enable")
+Reported-by: kernel test robot <lkp@intel.com>
+Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
+Link: https://lore.kernel.org/r/20201111112653.2710-2-vigneshr@ti.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/tty/serial/8250/8250_omap.c | 26 +++++++++++++-------------
+ 1 file changed, 13 insertions(+), 13 deletions(-)
+
+--- a/drivers/tty/serial/8250/8250_omap.c
++++ b/drivers/tty/serial/8250/8250_omap.c
+@@ -538,6 +538,11 @@ static void omap_8250_pm(struct uart_por
+ static void omap_serial_fill_features_erratas(struct uart_8250_port *up,
+ struct omap8250_priv *priv)
+ {
++ const struct soc_device_attribute k3_soc_devices[] = {
++ { .family = "AM65X", },
++ { .family = "J721E", .revision = "SR1.0" },
++ { /* sentinel */ }
++ };
+ u32 mvr, scheme;
+ u16 revision, major, minor;
+
+@@ -585,6 +590,14 @@ static void omap_serial_fill_features_er
+ default:
+ break;
+ }
++
++ /*
++ * AM65x SR1.0, AM65x SR2.0 and J721e SR1.0 don't
++ * don't have RHR_IT_DIS bit in IER2 register. So drop to flag
++ * to enable errata workaround.
++ */
++ if (soc_device_match(k3_soc_devices))
++ priv->habit &= ~UART_HAS_RHR_IT_DIS;
+ }
+
+ static void omap8250_uart_qos_work(struct work_struct *work)
+@@ -1208,12 +1221,6 @@ static int omap8250_no_handle_irq(struct
+ return 0;
+ }
+
+-static const struct soc_device_attribute k3_soc_devices[] = {
+- { .family = "AM65X", },
+- { .family = "J721E", .revision = "SR1.0" },
+- { /* sentinel */ }
+-};
+-
+ static struct omap8250_dma_params am654_dma = {
+ .rx_size = SZ_2K,
+ .rx_trigger = 1,
+@@ -1419,13 +1426,6 @@ static int omap8250_probe(struct platfor
+ up.dma->rxconf.src_maxburst = RX_TRIGGER;
+ up.dma->txconf.dst_maxburst = TX_TRIGGER;
+ }
+-
+- /*
+- * AM65x SR1.0, AM65x SR2.0 and J721e SR1.0 don't
+- * don't have RHR_IT_DIS bit in IER2 register
+- */
+- if (soc_device_match(k3_soc_devices))
+- priv->habit &= ~UART_HAS_RHR_IT_DIS;
+ }
+ #endif
+ ret = serial8250_register_8250_port(&up);
usb-serial-mos7720-improve-oom-handling-in-read_mos_reg.patch
net-ll_temac-remove-left-over-debug-message.patch
mm-page_alloc-speed-up-the-iteration-of-max_order.patch
+net-kcov-don-t-select-skb_extensions-when-there-is-no-net.patch
+serial-8250-8250_omap-fix-unused-variable-warning.patch
+net-linux-skbuff.h-combine-skb_extensions-kcov-handling.patch
+tty-drop-termiox-user-definitions.patch
+revert-r8169-avoid-link-up-interrupt-issue-on-rtl8106e-if-user-enables-aspm.patch
+x86-events-amd-iommu-fix-invalid-perf-result-due-to-iommu-pmc-power-gating.patch
--- /dev/null
+From c762a2b846b619c0f92f23e2e8e16f70d20df800 Mon Sep 17 00:00:00 2001
+From: Jiri Slaby <jslaby@suse.cz>
+Date: Tue, 5 Jan 2021 13:02:39 +0100
+Subject: tty: drop termiox user definitions
+
+From: Jiri Slaby <jslaby@suse.cz>
+
+commit c762a2b846b619c0f92f23e2e8e16f70d20df800 upstream.
+
+As was concluded in a follow-up discussion of commit e0efb3168d34 (tty:
+Remove dead termiox code) [1], termiox ioctls never worked, so there is
+barely anyone using this interface. We can safely remove the user
+definitions for this never adopted interface.
+
+[1] https://lore.kernel.org/lkml/c1c9fc04-02eb-2260-195b-44c357f057c0@kernel.org/t/#u
+
+Signed-off-by: Jiri Slaby <jslaby@suse.cz>
+Link: https://lore.kernel.org/r/20210105120239.28031-12-jslaby@suse.cz
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ include/uapi/linux/termios.h | 15 ---------------
+ 1 file changed, 15 deletions(-)
+
+--- a/include/uapi/linux/termios.h
++++ b/include/uapi/linux/termios.h
+@@ -5,19 +5,4 @@
+ #include <linux/types.h>
+ #include <asm/termios.h>
+
+-#define NFF 5
+-
+-struct termiox
+-{
+- __u16 x_hflag;
+- __u16 x_cflag;
+- __u16 x_rflag[NFF];
+- __u16 x_sflag;
+-};
+-
+-#define RTSXOFF 0x0001 /* RTS flow control on input */
+-#define CTSXON 0x0002 /* CTS flow control on output */
+-#define DTRXOFF 0x0004 /* DTR flow control on input */
+-#define DSRXON 0x0008 /* DCD flow control on output */
+-
+ #endif
--- /dev/null
+From e10de314287c2c14b0e6f0e3e961975ce2f4a83d Mon Sep 17 00:00:00 2001
+From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
+Date: Tue, 4 May 2021 01:52:36 -0500
+Subject: x86/events/amd/iommu: Fix invalid Perf result due to IOMMU PMC power-gating
+
+From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
+
+commit e10de314287c2c14b0e6f0e3e961975ce2f4a83d upstream.
+
+On certain AMD platforms, when the IOMMU performance counter source
+(csource) field is zero, power-gating for the counter is enabled, which
+prevents write access and returns zero for read access.
+
+This can cause invalid perf result especially when event multiplexing
+is needed (i.e. more number of events than available counters) since
+the current logic keeps track of the previously read counter value,
+and subsequently re-program the counter to continue counting the event.
+With power-gating enabled, we cannot gurantee successful re-programming
+of the counter.
+
+Workaround this issue by :
+
+1. Modifying the ordering of setting/reading counters and enabing/
+ disabling csources to only access the counter when the csource
+ is set to non-zero.
+
+2. Since AMD IOMMU PMU does not support interrupt mode, the logic
+ can be simplified to always start counting with value zero,
+ and accumulate the counter value when stopping without the need
+ to keep track and reprogram the counter with the previously read
+ counter value.
+
+This has been tested on systems with and without power-gating.
+
+Fixes: 994d6608efe4 ("iommu/amd: Remove performance counter pre-initialization test")
+Suggested-by: Alexander Monakov <amonakov@ispras.ru>
+Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
+Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
+Link: https://lkml.kernel.org/r/20210504065236.4415-1-suravee.suthikulpanit@amd.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/events/amd/iommu.c | 47 ++++++++++++++++++++++++--------------------
+ 1 file changed, 26 insertions(+), 21 deletions(-)
+
+--- a/arch/x86/events/amd/iommu.c
++++ b/arch/x86/events/amd/iommu.c
+@@ -18,8 +18,6 @@
+ #include "../perf_event.h"
+ #include "iommu.h"
+
+-#define COUNTER_SHIFT 16
+-
+ /* iommu pmu conf masks */
+ #define GET_CSOURCE(x) ((x)->conf & 0xFFULL)
+ #define GET_DEVID(x) (((x)->conf >> 8) & 0xFFFFULL)
+@@ -285,22 +283,31 @@ static void perf_iommu_start(struct perf
+ WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
+ hwc->state = 0;
+
++ /*
++ * To account for power-gating, which prevents write to
++ * the counter, we need to enable the counter
++ * before setting up counter register.
++ */
++ perf_iommu_enable_event(event);
++
+ if (flags & PERF_EF_RELOAD) {
+- u64 prev_raw_count = local64_read(&hwc->prev_count);
++ u64 count = 0;
+ struct amd_iommu *iommu = perf_event_2_iommu(event);
+
++ /*
++ * Since the IOMMU PMU only support counting mode,
++ * the counter always start with value zero.
++ */
+ amd_iommu_pc_set_reg(iommu, hwc->iommu_bank, hwc->iommu_cntr,
+- IOMMU_PC_COUNTER_REG, &prev_raw_count);
++ IOMMU_PC_COUNTER_REG, &count);
+ }
+
+- perf_iommu_enable_event(event);
+ perf_event_update_userpage(event);
+-
+ }
+
+ static void perf_iommu_read(struct perf_event *event)
+ {
+- u64 count, prev, delta;
++ u64 count;
+ struct hw_perf_event *hwc = &event->hw;
+ struct amd_iommu *iommu = perf_event_2_iommu(event);
+
+@@ -311,14 +318,11 @@ static void perf_iommu_read(struct perf_
+ /* IOMMU pc counter register is only 48 bits */
+ count &= GENMASK_ULL(47, 0);
+
+- prev = local64_read(&hwc->prev_count);
+- if (local64_cmpxchg(&hwc->prev_count, prev, count) != prev)
+- return;
+-
+- /* Handle 48-bit counter overflow */
+- delta = (count << COUNTER_SHIFT) - (prev << COUNTER_SHIFT);
+- delta >>= COUNTER_SHIFT;
+- local64_add(delta, &event->count);
++ /*
++ * Since the counter always start with value zero,
++ * simply just accumulate the count for the event.
++ */
++ local64_add(count, &event->count);
+ }
+
+ static void perf_iommu_stop(struct perf_event *event, int flags)
+@@ -328,15 +332,16 @@ static void perf_iommu_stop(struct perf_
+ if (hwc->state & PERF_HES_UPTODATE)
+ return;
+
++ /*
++ * To account for power-gating, in which reading the counter would
++ * return zero, we need to read the register before disabling.
++ */
++ perf_iommu_read(event);
++ hwc->state |= PERF_HES_UPTODATE;
++
+ perf_iommu_disable_event(event);
+ WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);
+ hwc->state |= PERF_HES_STOPPED;
+-
+- if (hwc->state & PERF_HES_UPTODATE)
+- return;
+-
+- perf_iommu_read(event);
+- hwc->state |= PERF_HES_UPTODATE;
+ }
+
+ static int perf_iommu_add(struct perf_event *event, int flags)
projects / thirdparty / kernel / stable-queue.git / commitdiff
