net: stmmac: thead: use rgmii_clock() for RGMII clock rate

Switch to using rgmii_clock() to get the RGMII TXC rate, and calculate
the divisor from the parent clock rate and the rate indicated by
rgmii_clock().

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Drew Fustini <drew@pdp7.com>
Link: https://patch.msgid.link/E1tlTo8-004W3a-CO@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c
index ddb1d8aba32153d05734b6683aa0a802e8dc4a78..f16fa341aadb38097a27074469aab2238e6ffc24 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c
@@ -109,6 +109,7 @@ static void thead_dwmac_fix_speed(void *priv, int speed, unsigned int mode)
        struct plat_stmmacenet_data *plat;
        struct thead_dwmac *dwmac = priv;
        unsigned long rate;
+       long tx_rate;
        u32 div, reg;
 
        plat = dwmac->plat;
@@ -131,21 +132,14 @@ static void thead_dwmac_fix_speed(void *priv, int speed, unsigned int mode)
 
                writel(0, dwmac->apb_base + GMAC_PLLCLK_DIV);
 
-               switch (speed) {
-               case SPEED_1000:
-                       div = rate / GMAC_GMII_RGMII_RATE;
-                       break;
-               case SPEED_100:
-                       div = rate / GMAC_MII_RATE;
-                       break;
-               case SPEED_10:
-                       div = rate * 10 / GMAC_MII_RATE;
-                       break;
-               default:
+               tx_rate = rgmii_clock(speed);
+               if (tx_rate < 0) {
                        dev_err(dwmac->dev, "invalid speed %d\n", speed);
                        return;
                }
 
+               div = rate / tx_rate;
+
                reg = FIELD_PREP(GMAC_PLLCLK_DIV_EN, 1) |
                      FIELD_PREP(GMAC_PLLCLK_DIV_NUM, div);
                writel(reg, dwmac->apb_base + GMAC_PLLCLK_DIV);