]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
mtd: spi-nor: add SFDP fixups for Quad Page Program
authorSudip Mukherjee <sudip.mukherjee@sifive.com>
Tue, 20 Sep 2022 18:48:08 +0000 (19:48 +0100)
committerTudor Ambarus <tudor.ambarus@microchip.com>
Tue, 22 Nov 2022 06:19:01 +0000 (08:19 +0200)
SFDP table of some flash chips do not advertise support of Quad Input
Page Program even though it has support. Use flags and add hardware
cap for these chips.

Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com>
[tudor.ambarus@microchip.com: move pp setting in spi_nor_init_default_params]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20220920184808.44876-2-sudip.mukherjee@sifive.com
drivers/mtd/spi-nor/core.c
drivers/mtd/spi-nor/core.h
drivers/mtd/spi-nor/issi.c

index dd45f286bb4ea08c4454805e0a335f018adcb45f..694a555defdc38f120a895342d0aaaed57959f4a 100644 (file)
@@ -2599,6 +2599,12 @@ static void spi_nor_init_default_params(struct spi_nor *nor)
        params->hwcaps.mask |= SNOR_HWCAPS_PP;
        spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP],
                                SPINOR_OP_PP, SNOR_PROTO_1_1_1);
+
+       if (info->flags & SPI_NOR_QUAD_PP) {
+               params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
+               spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_1_4],
+                                       SPINOR_OP_PP_1_1_4, SNOR_PROTO_1_1_4);
+       }
 }
 
 /**
index ef0a73dbf348e0c72712e41373d82d09ad3e98a5..f03b55cf7e6feb32fd711e132f32034c4a4f2c42 100644 (file)
@@ -458,6 +458,7 @@ struct spi_nor_fixups {
  *   SPI_NOR_NO_ERASE:        no erase command needed.
  *   NO_CHIP_ERASE:           chip does not support chip erase.
  *   SPI_NOR_NO_FR:           can't do fastread.
+ *   SPI_NOR_QUAD_PP:         flash supports Quad Input Page Program.
  *
  * @no_sfdp_flags:  flags that indicate support that can be discovered via SFDP.
  *                  Used when SFDP tables are not defined in the flash. These
@@ -507,6 +508,7 @@ struct flash_info {
 #define SPI_NOR_NO_ERASE               BIT(6)
 #define NO_CHIP_ERASE                  BIT(7)
 #define SPI_NOR_NO_FR                  BIT(8)
+#define SPI_NOR_QUAD_PP                        BIT(9)
 
        u8 no_sfdp_flags;
 #define SPI_NOR_SKIP_SFDP              BIT(0)
index 72dfd5f087adbd4d2513e463df54e97b5989808d..a0ddad2afffc231a877f902fc4911defeac9068e 100644 (file)
@@ -73,6 +73,7 @@ static const struct flash_info issi_nor_parts[] = {
        { "is25wp256", INFO(0x9d7019, 0, 0, 0)
                PARSE_SFDP
                FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
+               FLAGS(SPI_NOR_QUAD_PP)
                .fixups = &is25lp256_fixups },
 
        /* PMC */