drm/rockchip: vop2: Fix cluster windows alpha ctrl regsiters offset

The phy_id of cluster windws are not increase one for each window.

Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver")
Tested-by: Derek Foreman <derek.foreman@collabora.com>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20241209122943.2781431-6-andyshrk@163.com

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
index 0c8ec7220fbe9cc35719ed0d4a86dfcda72e52c8..07455dff42c96b0d231f8868156b0a33edc06a57 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -2336,7 +2336,6 @@ static int vop2_find_start_mixer_id_for_vp(struct vop2 *vop2, u8 port_id)
 
 static void vop2_setup_cluster_alpha(struct vop2 *vop2, struct vop2_win *main_win)
 {
-       u32 offset = (main_win->data->phys_id * 0x10);
        struct vop2_alpha_config alpha_config;
        struct vop2_alpha alpha;
        struct drm_plane_state *bottom_win_pstate;
@@ -2344,6 +2343,7 @@ static void vop2_setup_cluster_alpha(struct vop2 *vop2, struct vop2_win *main_wi
        u16 src_glb_alpha_val, dst_glb_alpha_val;
        bool premulti_en = false;
        bool swap = false;
+       u32 offset = 0;
 
        /* At one win mode, win0 is dst/bottom win, and win1 is a all zero src/top win */
        bottom_win_pstate = main_win->base.state;
@@ -2362,6 +2362,22 @@ static void vop2_setup_cluster_alpha(struct vop2 *vop2, struct vop2_win *main_wi
        vop2_parse_alpha(&alpha_config, &alpha);
 
        alpha.src_color_ctrl.bits.src_dst_swap = swap;
+
+       switch (main_win->data->phys_id) {
+       case ROCKCHIP_VOP2_CLUSTER0:
+               offset = 0x0;
+               break;
+       case ROCKCHIP_VOP2_CLUSTER1:
+               offset = 0x10;
+               break;
+       case ROCKCHIP_VOP2_CLUSTER2:
+               offset = 0x20;
+               break;
+       case ROCKCHIP_VOP2_CLUSTER3:
+               offset = 0x30;
+               break;
+       }
+
        vop2_writel(vop2, RK3568_CLUSTER0_MIX_SRC_COLOR_CTRL + offset,
                    alpha.src_color_ctrl.val);
        vop2_writel(vop2, RK3568_CLUSTER0_MIX_DST_COLOR_CTRL + offset,