intel_idle: Switch to new Intel CPU model defines

New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index e486027f8b07bf47ae1c276131d5db68e4461521..9aab7abc2ae90ead215ba31da9ae8e6efd56dbd9 100644 (file)
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -1494,53 +1494,53 @@ static const struct idle_cpu idle_cpu_srf __initconst = {
 };
 
 static const struct x86_cpu_id intel_idle_ids[] __initconst = {
-       X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP,          &idle_cpu_nhx),
-       X86_MATCH_INTEL_FAM6_MODEL(NEHALEM,             &idle_cpu_nehalem),
-       X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_G,           &idle_cpu_nehalem),
-       X86_MATCH_INTEL_FAM6_MODEL(WESTMERE,            &idle_cpu_nehalem),
-       X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP,         &idle_cpu_nhx),
-       X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX,          &idle_cpu_nhx),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL,        &idle_cpu_atom),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL_MID,    &idle_cpu_lincroft),
-       X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX,         &idle_cpu_nhx),
-       X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE,         &idle_cpu_snb),
-       X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X,       &idle_cpu_snx),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL,       &idle_cpu_atom),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT,     &idle_cpu_byt),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &idle_cpu_tangier),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT,        &idle_cpu_cht),
-       X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE,           &idle_cpu_ivb),
-       X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X,         &idle_cpu_ivt),
-       X86_MATCH_INTEL_FAM6_MODEL(HASWELL,             &idle_cpu_hsw),
-       X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X,           &idle_cpu_hsx),
-       X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L,           &idle_cpu_hsw),
-       X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G,           &idle_cpu_hsw),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D,   &idle_cpu_avn),
-       X86_MATCH_INTEL_FAM6_MODEL(BROADWELL,           &idle_cpu_bdw),
-       X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G,         &idle_cpu_bdw),
-       X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X,         &idle_cpu_bdx),
-       X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D,         &idle_cpu_bdx),
-       X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L,           &idle_cpu_skl),
-       X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE,             &idle_cpu_skl),
-       X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L,          &idle_cpu_skl),
-       X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE,            &idle_cpu_skl),
-       X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X,           &idle_cpu_skx),
-       X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,           &idle_cpu_icx),
-       X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D,           &idle_cpu_icx),
-       X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,           &idle_cpu_adl),
-       X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,         &idle_cpu_adl_l),
-       X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L,        &idle_cpu_mtl_l),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,      &idle_cpu_gmt),
-       X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X,    &idle_cpu_spr),
-       X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X,     &idle_cpu_spr),
-       X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL,        &idle_cpu_knl),
-       X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM,        &idle_cpu_knl),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT,       &idle_cpu_bxt),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS,  &idle_cpu_bxt),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D,     &idle_cpu_dnv),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D,      &idle_cpu_snr),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT,      &idle_cpu_grr),
-       X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X,    &idle_cpu_srf),
+       X86_MATCH_VFM(INTEL_NEHALEM_EP,         &idle_cpu_nhx),
+       X86_MATCH_VFM(INTEL_NEHALEM,            &idle_cpu_nehalem),
+       X86_MATCH_VFM(INTEL_NEHALEM_G,          &idle_cpu_nehalem),
+       X86_MATCH_VFM(INTEL_WESTMERE,           &idle_cpu_nehalem),
+       X86_MATCH_VFM(INTEL_WESTMERE_EP,        &idle_cpu_nhx),
+       X86_MATCH_VFM(INTEL_NEHALEM_EX,         &idle_cpu_nhx),
+       X86_MATCH_VFM(INTEL_ATOM_BONNELL,       &idle_cpu_atom),
+       X86_MATCH_VFM(INTEL_ATOM_BONNELL_MID,   &idle_cpu_lincroft),
+       X86_MATCH_VFM(INTEL_WESTMERE_EX,        &idle_cpu_nhx),
+       X86_MATCH_VFM(INTEL_SANDYBRIDGE,        &idle_cpu_snb),
+       X86_MATCH_VFM(INTEL_SANDYBRIDGE_X,      &idle_cpu_snx),
+       X86_MATCH_VFM(INTEL_ATOM_SALTWELL,      &idle_cpu_atom),
+       X86_MATCH_VFM(INTEL_ATOM_SILVERMONT,    &idle_cpu_byt),
+       X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &idle_cpu_tangier),
+       X86_MATCH_VFM(INTEL_ATOM_AIRMONT,       &idle_cpu_cht),
+       X86_MATCH_VFM(INTEL_IVYBRIDGE,          &idle_cpu_ivb),
+       X86_MATCH_VFM(INTEL_IVYBRIDGE_X,        &idle_cpu_ivt),
+       X86_MATCH_VFM(INTEL_HASWELL,            &idle_cpu_hsw),
+       X86_MATCH_VFM(INTEL_HASWELL_X,          &idle_cpu_hsx),
+       X86_MATCH_VFM(INTEL_HASWELL_L,          &idle_cpu_hsw),
+       X86_MATCH_VFM(INTEL_HASWELL_G,          &idle_cpu_hsw),
+       X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_D,  &idle_cpu_avn),
+       X86_MATCH_VFM(INTEL_BROADWELL,          &idle_cpu_bdw),
+       X86_MATCH_VFM(INTEL_BROADWELL_G,        &idle_cpu_bdw),
+       X86_MATCH_VFM(INTEL_BROADWELL_X,        &idle_cpu_bdx),
+       X86_MATCH_VFM(INTEL_BROADWELL_D,        &idle_cpu_bdx),
+       X86_MATCH_VFM(INTEL_SKYLAKE_L,          &idle_cpu_skl),
+       X86_MATCH_VFM(INTEL_SKYLAKE,            &idle_cpu_skl),
+       X86_MATCH_VFM(INTEL_KABYLAKE_L,         &idle_cpu_skl),
+       X86_MATCH_VFM(INTEL_KABYLAKE,           &idle_cpu_skl),
+       X86_MATCH_VFM(INTEL_SKYLAKE_X,          &idle_cpu_skx),
+       X86_MATCH_VFM(INTEL_ICELAKE_X,          &idle_cpu_icx),
+       X86_MATCH_VFM(INTEL_ICELAKE_D,          &idle_cpu_icx),
+       X86_MATCH_VFM(INTEL_ALDERLAKE,          &idle_cpu_adl),
+       X86_MATCH_VFM(INTEL_ALDERLAKE_L,        &idle_cpu_adl_l),
+       X86_MATCH_VFM(INTEL_METEORLAKE_L,       &idle_cpu_mtl_l),
+       X86_MATCH_VFM(INTEL_ATOM_GRACEMONT,     &idle_cpu_gmt),
+       X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X,   &idle_cpu_spr),
+       X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X,    &idle_cpu_spr),
+       X86_MATCH_VFM(INTEL_XEON_PHI_KNL,       &idle_cpu_knl),
+       X86_MATCH_VFM(INTEL_XEON_PHI_KNM,       &idle_cpu_knl),
+       X86_MATCH_VFM(INTEL_ATOM_GOLDMONT,      &idle_cpu_bxt),
+       X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &idle_cpu_bxt),
+       X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D,    &idle_cpu_dnv),
+       X86_MATCH_VFM(INTEL_ATOM_TREMONT_D,     &idle_cpu_snr),
+       X86_MATCH_VFM(INTEL_ATOM_CRESTMONT,     &idle_cpu_grr),
+       X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X,   &idle_cpu_srf),
        {}
 };
 
@@ -1990,27 +1990,27 @@ static void __init intel_idle_init_cstates_icpu(struct cpuidle_driver *drv)
 {
        int cstate;
 
-       switch (boot_cpu_data.x86_model) {
-       case INTEL_FAM6_IVYBRIDGE_X:
+       switch (boot_cpu_data.x86_vfm) {
+       case INTEL_IVYBRIDGE_X:
                ivt_idle_state_table_update();
                break;
-       case INTEL_FAM6_ATOM_GOLDMONT:
-       case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
+       case INTEL_ATOM_GOLDMONT:
+       case INTEL_ATOM_GOLDMONT_PLUS:
                bxt_idle_state_table_update();
                break;
-       case INTEL_FAM6_SKYLAKE:
+       case INTEL_SKYLAKE:
                sklh_idle_state_table_update();
                break;
-       case INTEL_FAM6_SKYLAKE_X:
+       case INTEL_SKYLAKE_X:
                skx_idle_state_table_update();
                break;
-       case INTEL_FAM6_SAPPHIRERAPIDS_X:
-       case INTEL_FAM6_EMERALDRAPIDS_X:
+       case INTEL_SAPPHIRERAPIDS_X:
+       case INTEL_EMERALDRAPIDS_X:
                spr_idle_state_table_update();
                break;
-       case INTEL_FAM6_ALDERLAKE:
-       case INTEL_FAM6_ALDERLAKE_L:
-       case INTEL_FAM6_ATOM_GRACEMONT:
+       case INTEL_ALDERLAKE:
+       case INTEL_ALDERLAKE_L:
+       case INTEL_ATOM_GRACEMONT:
                adl_idle_state_table_update();
                break;
        }