]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
accel/tcg: Introduce TCGCPUOps::mmu_index() callback
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Tue, 1 Apr 2025 08:09:15 +0000 (10:09 +0200)
committerRichard Henderson <richard.henderson@linaro.org>
Wed, 23 Apr 2025 22:04:57 +0000 (15:04 -0700)
We'll move CPUClass::mmu_index() to TCGCPUOps::mmu_index().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250401080938.32278-3-philmd@linaro.org>

include/accel/tcg/cpu-mmu-index.h
include/accel/tcg/cpu-ops.h

index 8d1cb53bfa4dd8ddb4cb508a115795c3e50b26e7..f1ca385d3c98b61ea77c25335badfdfc8fb1d3d4 100644 (file)
@@ -10,6 +10,7 @@
 #define ACCEL_TCG_CPU_MMU_INDEX_H
 
 #include "hw/core/cpu.h"
+#include "accel/tcg/cpu-ops.h"
 #include "tcg/debug-assert.h"
 #ifdef COMPILING_PER_TARGET
 # ifdef CONFIG_USER_ONLY
@@ -33,7 +34,9 @@ static inline int cpu_mmu_index(CPUState *cs, bool ifetch)
 # endif
 #endif
 
-    int ret = cs->cc->mmu_index(cs, ifetch);
+    const TCGCPUOps *tcg_ops = cs->cc->tcg_ops;
+    int ret = tcg_ops->mmu_index ? tcg_ops->mmu_index(cs, ifetch)
+                                 : cs->cc->mmu_index(cs, ifetch);
     tcg_debug_assert(ret >= 0 && ret < NB_MMU_MODES);
     return ret;
 }
index f60e5303f2141c2e3b06453157dfd56b804a0372..106a0688da868861caf3c1f9ec234cef0561b847 100644 (file)
@@ -67,6 +67,9 @@ struct TCGCPUOps {
     /** @debug_excp_handler: Callback for handling debug exceptions */
     void (*debug_excp_handler)(CPUState *cpu);
 
+    /** @mmu_index: Callback for choosing softmmu mmu index */
+    int (*mmu_index)(CPUState *cpu, bool ifetch);
+
 #ifdef CONFIG_USER_ONLY
     /**
      * @fake_user_interrupt: Callback for 'fake exception' handling.