0+ <_start>:
+[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sdl %eax,%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ssl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 e1 7e 08 2d c0 \{evex\} vcvtss2si %xmm0,%eax
+[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,%k0
+ +[a-f0-9]+: 62 f1 7e 38 e6 f5 vcvtdq2pd %ymm5,%zmm6
+ +[a-f0-9]+: 62 f1 7a 38 e6 f5 vcvtdq2pd %xmm5,%ymm6
+ +[a-f0-9]+: 62 f1 7e 38 7a f5 vcvtudq2pd %ymm5,%zmm6
+ +[a-f0-9]+: 62 f1 7a 38 7a f5 vcvtudq2pd %xmm5,%ymm6
#pass
.insn EVEX.LIG.F2.0F.W1 0x7b, %eax,{rd-sae},%xmm5,%xmm6
.byte 0x62, 0xe1, 0x7e, 0x08, 0x2d, 0xc0
.byte 0x62, 0xe1, 0x7c, 0x08, 0xc2, 0xc0, 0x00
+ .insn EVEX.512.F3.0F.W0 0xe6, {rd-sae},%zmm5,%ymm6
+ .insn EVEX.256.F3.0F.W0 0xe6, {rd-sae},%ymm5,%xmm6
+ .insn EVEX.512.F3.0F.W0 0x7a, {rd-sae},%zmm5,%ymm6
+ .insn EVEX.256.F3.0F.W0 0x7a, {rd-sae},%ymm5,%xmm6
0+ <_start>:
+[a-f0-9]+: 62 f1 d6 38 2a f0 vcvtsi2ss %rax,\{rd-sae\},%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,\{rd-bad\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 2a f0 vcvtsi2sd %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 2a f0 vcvtsi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 08 7b f0 vcvtusi2ss %rax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 57 08 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 08 7b f0 vcvtusi2sd %rax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6
- +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,\{rd-bad\},%xmm5,%xmm6
+ +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,%xmm5,%xmm6
+[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6
+[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,%r16d
+[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,\(bad\)
+ +[a-f0-9]+: 62 f1 7e 38 e6 f5 vcvtdq2pd %ymm5,%zmm6
+ +[a-f0-9]+: 62 f1 7a 38 e6 f5 vcvtdq2pd %xmm5,%ymm6
+ +[a-f0-9]+: 62 f1 7e 38 7a f5 vcvtudq2pd %ymm5,%zmm6
+ +[a-f0-9]+: 62 f1 7a 38 7a f5 vcvtudq2pd %xmm5,%ymm6
#pass
},
/* EVEX_W_0F7A_P_1 */
{
- { "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq }, 0 },
+ { "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexR64 }, 0 },
{ "vcvtuqq2pd", { XM, EXx, EXxEVexR }, 0 },
},
/* EVEX_W_0F7A_P_2 */
},
/* EVEX_W_0FE6_P_1 */
{
- { "%XEvcvtdq2pd", { XM, EXEvexHalfBcstXmmq }, 0 },
+ { "%XEvcvtdq2pd", { XM, EXEvexHalfBcstXmmq, EXxEVexR64 }, 0 },
{ "vcvtqq2pd", { XM, EXx, EXxEVexR }, 0 },
},
/* EVEX_W_0FE7 */
if (ins->modrm.mod != 3 || !ins->vex.b)
return true;
+ ins->evex_used |= EVEX_b_used;
switch (bytemode)
{
case evex_rounding_64_mode:
return true;
/* Fall through. */
case evex_rounding_mode:
- ins->evex_used |= EVEX_b_used;
oappend (ins, names_rounding[ins->vex.ll]);
break;
case evex_sae_mode:
- ins->evex_used |= EVEX_b_used;
oappend (ins, "{");
break;
default: