]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
power: zynqmp: Add power domain driver for ZynqMP
authorMichal Simek <michal.simek@xilinx.com>
Tue, 30 Nov 2021 15:32:43 +0000 (16:32 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 6 Dec 2021 12:32:48 +0000 (13:32 +0100)
Driver should be enabled by CONFIG_POWER_DOMAIN=y and
CONFIG_ZYNQMP_POWER_DOMAIN=y. Power domain driver doesn't have own DT node
but it uses zynqmp firmware DT node that's why there is a need to bind
driver when firmware node is found.

Driver itself is simple. It is sending pmufw config object overlay for
enabling access to device which is done in ...domain_request().
In ...domain_on() capabilities are passed and node is requested.
This should be bare minimum of required to get power domain driver working.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
MAINTAINERS
drivers/firmware/firmware-zynqmp.c
drivers/power/domain/Kconfig
drivers/power/domain/Makefile
drivers/power/domain/zynqmp-power-domain.c [new file with mode: 0644]
include/zynqmp_firmware.h

index 506b141137e64e76094399ce8a3f92cc9cb4a858..26146cd91bda2d0d86f0030ae539a55e1018deb1 100644 (file)
@@ -613,6 +613,7 @@ F:  drivers/mmc/zynq_sdhci.c
 F:     drivers/mtd/nand/raw/zynq_nand.c
 F:     drivers/net/phy/xilinx_phy.c
 F:     drivers/net/zynq_gem.c
+F:     drivers/power/domain/zynqmp-power-domain.c
 F:     drivers/serial/serial_zynq.c
 F:     drivers/reset/reset-zynqmp.c
 F:     drivers/rtc/zynqmp_rtc.c
index a01f5ff71b954c2885d55cc65edd339d6078ccb4..ec2ab6f2b10b5e3d8aca7b967a363d3a24f1a839 100644 (file)
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <dm/lists.h>
 #include <log.h>
 #include <zynqmp_firmware.h>
 #include <asm/cache.h>
@@ -270,8 +271,25 @@ static const struct udevice_id zynqmp_firmware_ids[] = {
        { }
 };
 
+static int zynqmp_firmware_bind(struct udevice *dev)
+{
+       int ret;
+       struct udevice *child;
+
+       if (IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN)) {
+               ret = device_bind_driver_to_node(dev, "zynqmp_power_domain",
+                                                "zynqmp_power_domain",
+                                                dev_ofnode(dev), &child);
+               if (ret)
+                       printf("zynqmp power domain driver is not binded\n");
+       }
+
+       return 0;
+}
+
 U_BOOT_DRIVER(zynqmp_firmware) = {
        .id = UCLASS_FIRMWARE,
        .name = "zynqmp_firmware",
        .of_match = zynqmp_firmware_ids,
+       .bind = zynqmp_firmware_bind,
 };
index 99b3f9ae71b41f9fbb4e75476a2ce8657ec8da4e..40db9e14cbd1690bf8e21ce6ca3a9ab469039ef9 100644 (file)
@@ -79,4 +79,13 @@ config TI_POWER_DOMAIN
        help
          Generic power domain implementation for TI K3 devices.
 
+config ZYNQMP_POWER_DOMAIN
+       bool "Enable the Xilinx ZynqMP Power domain driver"
+       depends on POWER_DOMAIN && ZYNQMP_FIRMWARE
+       help
+         Generic power domain implementation for Xilinx ZynqMP devices.
+         The driver should be enabled when system starts in very minimal
+         configuration and it is extended at run time. Then enabling
+         the driver will ensure that PMUFW enable access to requested IP.
+
 endmenu
index 3d1e5f073cb88be6c9e27cc1dece00843731c02e..767678ae07a4877e0c49ca7560496282dea24a60 100644 (file)
@@ -15,3 +15,4 @@ obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain-test.o
 obj-$(CONFIG_TEGRA186_POWER_DOMAIN) += tegra186-power-domain.o
 obj-$(CONFIG_TI_SCI_POWER_DOMAIN) += ti-sci-power-domain.o
 obj-$(CONFIG_TI_POWER_DOMAIN) += ti-power-domain.o
+obj-$(CONFIG_ZYNQMP_POWER_DOMAIN) += zynqmp-power-domain.o
diff --git a/drivers/power/domain/zynqmp-power-domain.c b/drivers/power/domain/zynqmp-power-domain.c
new file mode 100644 (file)
index 0000000..6943658
--- /dev/null
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021, Xilinx. Inc.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <log.h>
+#include <malloc.h>
+#include <misc.h>
+#include <power-domain-uclass.h>
+#include <linux/bitops.h>
+
+#include <zynqmp_firmware.h>
+
+static int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
+                                 const u32 qos, const enum zynqmp_pm_request_ack ack)
+{
+       return xilinx_pm_request(PM_REQUEST_NODE, node, capabilities,
+                                  qos, ack, NULL);
+}
+
+static int zynqmp_power_domain_request(struct power_domain *power_domain)
+{
+       dev_dbg(power_domain->dev, "Request for id: %ld\n", power_domain->id);
+
+       return zynqmp_pmufw_node(power_domain->id);
+}
+
+static int zynqmp_power_domain_free(struct power_domain *power_domain)
+{
+       /* nop now */
+       return 0;
+}
+
+static int zynqmp_power_domain_on(struct power_domain *power_domain)
+{
+       dev_dbg(power_domain->dev, "Domain ON for id: %ld\n", power_domain->id);
+
+       return zynqmp_pm_request_node(power_domain->id,
+                                     ZYNQMP_PM_CAPABILITY_ACCESS,
+                                     ZYNQMP_PM_MAX_QOS,
+                                     ZYNQMP_PM_REQUEST_ACK_BLOCKING);
+}
+
+static int zynqmp_power_domain_off(struct power_domain *power_domain)
+{
+       /* nop now */
+       return 0;
+}
+
+struct power_domain_ops zynqmp_power_domain_ops = {
+       .request = zynqmp_power_domain_request,
+       .rfree = zynqmp_power_domain_free,
+       .on = zynqmp_power_domain_on,
+       .off = zynqmp_power_domain_off,
+};
+
+static int zynqmp_power_domain_probe(struct udevice *dev)
+{
+       return 0;
+}
+
+U_BOOT_DRIVER(zynqmp_power_domain) = {
+       .name = "zynqmp_power_domain",
+       .id = UCLASS_POWER_DOMAIN,
+       .probe = zynqmp_power_domain_probe,
+       .ops = &zynqmp_power_domain_ops,
+};
index 6d246019c4b8b5bf4297ba4c0dc61f43069e0575..07c8bed21052ecee37eb6d53e9784cb27d76a987 100644 (file)
@@ -450,4 +450,12 @@ int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
 #define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK      0x00000100
 #define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK      0x00000200
 
+/* Node capabilities */
+#define ZYNQMP_PM_CAPABILITY_ACCESS    0x1U
+#define ZYNQMP_PM_CAPABILITY_CONTEXT   0x2U
+#define ZYNQMP_PM_CAPABILITY_WAKEUP    0x4U
+#define ZYNQMP_PM_CAPABILITY_UNUSABLE  0x8U
+
+#define ZYNQMP_PM_MAX_QOS              100U
+
 #endif /* _ZYNQMP_FIRMWARE_H_ */