--- /dev/null
+From 2208d655a91f9879bd9a39ff9df05dd668b3512c Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Fri, 14 Nov 2014 09:25:29 +0100
+Subject: drm/i915: drop WaSetupGtModeTdRowDispatch:snb
+
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit 2208d655a91f9879bd9a39ff9df05dd668b3512c upstream.
+
+This reverts the regressing
+
+commit 6547fbdbfff62c99e4f7b4f985ff8b3454f33b0f
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Fri Dec 14 23:38:29 2012 +0100
+
+ drm/i915: Implement WaSetupGtModeTdRowDispatch
+
+that causes GPU hangs immediately on boot.
+
+Reported-by: Leo Wolf <jclw@ymail.com>
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79996
+Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
+[Jani: amended the commit message slightly.]
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_pm.c | 5 -----
+ 1 file changed, 5 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -5247,11 +5247,6 @@ static void gen6_init_clock_gating(struc
+ I915_WRITE(_3D_CHICKEN,
+ _MASKED_BIT_ENABLE(_3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB));
+
+- /* WaSetupGtModeTdRowDispatch:snb */
+- if (IS_SNB_GT1(dev))
+- I915_WRITE(GEN6_GT_MODE,
+- _MASKED_BIT_ENABLE(GEN6_TD_FOUR_ROW_DISPATCH_DISABLE));
+-
+ /* WaDisable_RenderCache_OperationalFlush:snb */
+ I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE));
+
--- /dev/null
+From bdfa7542d40e6251c232a802231b37116bd31b11 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
+Date: Tue, 27 May 2014 21:33:09 +0300
+Subject: drm/i915: Ignore SURFLIVE and flip counter when the GPU gets reset
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
+
+commit bdfa7542d40e6251c232a802231b37116bd31b11 upstream.
+
+During a GPU reset we need to get pending page flip cleared out
+since the ring contents are gone and flip will never complete
+on its own. This used to work until the mmio vs. CS flip race
+detection came about. That piece of code is looking for a
+specific surface address in the SURFLIVE register, but as
+a flip to that address may never happen the check may never
+pass. So we should just skip the SURFLIVE and flip counter
+checks when the GPU gets reset.
+
+intel_display_handle_reset() tries to effectively complete
+the flip anyway by calling .update_primary_plane(). But that
+may not satisfy the conditions of the mmio vs. CS race
+detection since there's no guarantee that a modeset didn't
+sneak in between the GPU reset and intel_display_handle_reset().
+Such a modeset will not wait for pending flips due to the ongoing GPU
+reset, and then the primary plane updates performed by
+intel_display_handle_reset() will already use the new surface
+address, and thus the surface address the flip is waiting for
+might never appear in SURFLIVE. The result is that the flip
+will never complete and attempts to perform further page flips
+will fail with -EBUSY.
+
+During the GPU reset intel_crtc_has_pending_flip() will return
+false regardless, so the deadlock with a modeset vs. the error
+work acquiring crtc->mutex was avoided. And the reset_counter
+check in intel_crtc_has_pending_flip() actually made this bug
+even less severe since it allowed normal modesets to go through
+even though there's a pending flip.
+
+This is a regression introduced by me here:
+ commit 75f7f3ec600524c9544cc31695155f1a9ddbe1d9
+ Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ Date: Tue Apr 15 21:41:34 2014 +0300
+
+ drm/i915: Fix mmio vs. CS flip race on ILK+
+
+Testcase: igt/kms_flip/flip-vs-panning-vs-hang
+Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_display.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -9217,6 +9217,10 @@ static bool page_flip_finished(struct in
+ struct drm_device *dev = crtc->base.dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
++ if (i915_reset_in_progress(&dev_priv->gpu_error) ||
++ crtc->reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter))
++ return true;
++
+ /*
+ * The relevant registers doen't exist on pre-ctg.
+ * As the flip done interrupt doesn't trigger for mmio
--- /dev/null
+From 0485c9dc24ec0939b42ca5104c0373297506b555 Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Fri, 14 Nov 2014 10:09:49 +0100
+Subject: drm/i915: Kick fbdev before vgacon
+
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit 0485c9dc24ec0939b42ca5104c0373297506b555 upstream.
+
+It's magic, but it seems to work.
+
+This fixes a regression introduced in
+
+commit 1bb9e632a0aeee1121e652ee4dc80e5e6f14bcd2
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Tue Jul 8 10:02:43 2014 +0200
+
+ drm/i915: Only unbind vgacon, not other console drivers
+
+My best guess is that the vga fbdev driver falls over if we rip out
+parts of vgacon. Hooray.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82439
+Reported-and-tested-by: Lv Zheng <lv.zheng@intel.com>
+Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
+Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_dma.c | 10 ++++++----
+ 1 file changed, 6 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/i915/i915_dma.c
++++ b/drivers/gpu/drm/i915/i915_dma.c
+@@ -1670,15 +1670,17 @@ int i915_driver_load(struct drm_device *
+ goto out_regs;
+
+ if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+- ret = i915_kick_out_vgacon(dev_priv);
++ /* WARNING: Apparently we must kick fbdev drivers before vgacon,
++ * otherwise the vga fbdev driver falls over. */
++ ret = i915_kick_out_firmware_fb(dev_priv);
+ if (ret) {
+- DRM_ERROR("failed to remove conflicting VGA console\n");
++ DRM_ERROR("failed to remove conflicting framebuffer drivers\n");
+ goto out_gtt;
+ }
+
+- ret = i915_kick_out_firmware_fb(dev_priv);
++ ret = i915_kick_out_vgacon(dev_priv);
+ if (ret) {
+- DRM_ERROR("failed to remove conflicting framebuffer drivers\n");
++ DRM_ERROR("failed to remove conflicting VGA console\n");
+ goto out_gtt;
+ }
+ }
--- /dev/null
+From b7bc596ebbe0cddc97d76ef9309f64471bbf13eb Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 19 Nov 2014 13:12:54 -0500
+Subject: drm/radeon: disable native backlight control on pre-r6xx asics (v2)
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit b7bc596ebbe0cddc97d76ef9309f64471bbf13eb upstream.
+
+Just use the acpi interface. That's what windows uses on this
+generation and it's the only thing that seems to work reliably
+on these generation parts.
+
+You can still force the native backlight interface by setting
+radeon.backlight=1
+
+Bug:
+https://bugzilla.kernel.org/show_bug.cgi?id=88501
+
+v2: merge into above if/else block
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_encoders.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/radeon_encoders.c
++++ b/drivers/gpu/drm/radeon/radeon_encoders.c
+@@ -179,6 +179,9 @@ static void radeon_encoder_add_backlight
+ (rdev->pdev->subsystem_vendor == 0x1734) &&
+ (rdev->pdev->subsystem_device == 0x1107))
+ use_bl = false;
++ /* disable native backlight control on older asics */
++ else if (rdev->family < CHIP_R600)
++ use_bl = false;
+ else
+ use_bl = true;
+ }
--- /dev/null
+From 28731d5818ae25b92d1fb82fe0ac196e97102c1b Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 12 Nov 2014 19:17:02 -0500
+Subject: drm/radeon: fix endian swapping in vbios fetch for tdp table
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 28731d5818ae25b92d1fb82fe0ac196e97102c1b upstream.
+
+Value needs to be swapped on BE.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/r600_dpm.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/r600_dpm.c
++++ b/drivers/gpu/drm/radeon/r600_dpm.c
+@@ -1255,7 +1255,7 @@ int r600_parse_extended_power_table(stru
+ (mode_info->atom_context->bios + data_offset +
+ le16_to_cpu(ext_hdr->usPowerTuneTableOffset));
+ rdev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit =
+- ppt->usMaximumPowerDeliveryLimit;
++ le16_to_cpu(ppt->usMaximumPowerDeliveryLimit);
+ pt = &ppt->power_tune_table;
+ } else {
+ ATOM_PPLIB_POWERTUNE_Table *ppt = (ATOM_PPLIB_POWERTUNE_Table *)
--- /dev/null
+From 1348579433566355e570008929daa09a0db64fd8 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 14 Nov 2014 12:08:34 -0500
+Subject: drm/radeon: report disconnected for LVDS/eDP with PX if ddc fails
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 1348579433566355e570008929daa09a0db64fd8 upstream.
+
+If ddc fails, presumably the i2c mux (and hopefully the signal
+mux) are switched to the other GPU so don't fetch the edid from
+the vbios so that the connector reports disconnected.
+
+bug:
+https://bugzilla.opensuse.org/show_bug.cgi?id=904417
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_connectors.c | 19 ++++++++++++++++++-
+ 1 file changed, 18 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_connectors.c
++++ b/drivers/gpu/drm/radeon/radeon_connectors.c
+@@ -322,6 +322,12 @@ static void radeon_connector_get_edid(st
+ }
+
+ if (!radeon_connector->edid) {
++ /* don't fetch the edid from the vbios if ddc fails and runpm is
++ * enabled so we report disconnected.
++ */
++ if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
++ return;
++
+ if (rdev->is_atom_bios) {
+ /* some laptops provide a hardcoded edid in rom for LCDs */
+ if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) ||
+@@ -826,6 +832,8 @@ static int radeon_lvds_mode_valid(struct
+ static enum drm_connector_status
+ radeon_lvds_detect(struct drm_connector *connector, bool force)
+ {
++ struct drm_device *dev = connector->dev;
++ struct radeon_device *rdev = dev->dev_private;
+ struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+ struct drm_encoder *encoder = radeon_best_single_encoder(connector);
+ enum drm_connector_status ret = connector_status_disconnected;
+@@ -842,7 +850,11 @@ radeon_lvds_detect(struct drm_connector
+ /* check if panel is valid */
+ if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
+ ret = connector_status_connected;
+-
++ /* don't fetch the edid from the vbios if ddc fails and runpm is
++ * enabled so we report disconnected.
++ */
++ if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
++ ret = connector_status_disconnected;
+ }
+
+ /* check for edid as well */
+@@ -1589,6 +1601,11 @@ radeon_dp_detect(struct drm_connector *c
+ /* check if panel is valid */
+ if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
+ ret = connector_status_connected;
++ /* don't fetch the edid from the vbios if ddc fails and runpm is
++ * enabled so we report disconnected.
++ */
++ if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
++ ret = connector_status_disconnected;
+ }
+ /* eDP is always DP */
+ radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
--- /dev/null
+From 91ed6fd2c383bb8f02d66e98b4a4d2f7207249dc Mon Sep 17 00:00:00 2001
+From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Date: Fri, 3 Oct 2014 15:18:59 +1000
+Subject: gpu/radeon: Set flag to indicate broken 64-bit MSI
+
+From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+
+commit 91ed6fd2c383bb8f02d66e98b4a4d2f7207249dc upstream.
+
+Some radeon ASICs don't support all 64 address bits of MSIs despite
+advertising support for 64-bit MSIs in their configuration space.
+
+This breaks on systems such as IBM POWER7/8, where 64-bit MSIs can
+be assigned with some of the high address bits set.
+
+This makes use of the newly introduced "no_64bit_msi" flag in structure
+pci_dev to allow the MSI allocation code to fallback to 32-bit MSIs
+on those adapters.
+
+Adding Alex's review tag. Patch to the driver is identical to the
+reviewed one, I dropped the arch/powerpc hunk rewrote the subject
+and cset comment.
+
+Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_irq_kms.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
++++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
+@@ -202,6 +202,16 @@ static bool radeon_msi_ok(struct radeon_
+ if (rdev->flags & RADEON_IS_AGP)
+ return false;
+
++ /*
++ * Older chips have a HW limitation, they can only generate 40 bits
++ * of address for "64-bit" MSIs which breaks on some platforms, notably
++ * IBM POWER servers, so we limit them
++ */
++ if (rdev->family < CHIP_BONAIRE) {
++ dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
++ rdev->pdev->no_64bit_msi = 1;
++ }
++
+ /* force MSI on */
+ if (radeon_msi == 1)
+ return true;
irqchip-atmel-aic-fix-irqdomain-initialization.patch
bnx2fc-do-not-add-shared-skbs-to-the-fcoe_rx_list.patch
clk-divider-fix-read_only-when-divider-1.patch
+drm-radeon-fix-endian-swapping-in-vbios-fetch-for-tdp-table.patch
+drm-radeon-disable-native-backlight-control-on-pre-r6xx-asics-v2.patch
+drm-i915-drop-wasetupgtmodetdrowdispatch-snb.patch
+drm-i915-kick-fbdev-before-vgacon.patch
+drm-i915-ignore-surflive-and-flip-counter-when-the-gpu-gets-reset.patch
+drm-radeon-report-disconnected-for-lvds-edp-with-px-if-ddc-fails.patch
+gpu-radeon-set-flag-to-indicate-broken-64-bit-msi.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
