]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
cpufreq/amd-pstate: Update cppc_req_cached for shared mem EPP writes
authorMario Limonciello <mario.limonciello@amd.com>
Mon, 9 Dec 2024 18:02:14 +0000 (12:02 -0600)
committerMario Limonciello <mario.limonciello@amd.com>
Thu, 6 Mar 2025 19:01:25 +0000 (13:01 -0600)
On EPP only writes update the cached variable so that the min/max
performance controls don't need to be updated again.

Reviewed-by: Dhananjay Ugwekar <dhananjay.ugwekar@amd.com>
Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
drivers/cpufreq/amd-pstate.c

index e5db731618e820b260739778786d10f3d38c5b6c..df42a2d22225bb2a3443bba91fc74bfd2ba588a5 100644 (file)
@@ -336,6 +336,7 @@ static int shmem_set_epp(struct cpufreq_policy *policy, u8 epp)
 {
        struct amd_cpudata *cpudata = policy->driver_data;
        struct cppc_perf_ctrls perf_ctrls;
+       u64 value;
        int ret;
 
        if (trace_amd_pstate_epp_perf_enabled()) {
@@ -362,6 +363,11 @@ static int shmem_set_epp(struct cpufreq_policy *policy, u8 epp)
        }
        WRITE_ONCE(cpudata->epp_cached, epp);
 
+       value = READ_ONCE(cpudata->cppc_req_cached);
+       value &= ~AMD_CPPC_EPP_PERF_MASK;
+       value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);
+       WRITE_ONCE(cpudata->cppc_req_cached, value);
+
        return ret;
 }