--- /dev/null
+From fca8c90d519dedd4f4b19901d005c243f7f0bf2e Mon Sep 17 00:00:00 2001
+From: "Chew, Chiau Ee" <chiau.ee.chew@intel.com>
+Date: Thu, 16 May 2013 15:33:29 +0800
+Subject: ata_piix: add PCI IDs for Intel BayTail
+
+From: "Chew, Chiau Ee" <chiau.ee.chew@intel.com>
+
+commit fca8c90d519dedd4f4b19901d005c243f7f0bf2e upstream.
+
+Adds IDE-mode SATA Device IDs for the Intel BayTrail platform.
+
+Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
+Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
+Signed-off-by: Tejun Heo <tj@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/ata/ata_piix.c | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+--- a/drivers/ata/ata_piix.c
++++ b/drivers/ata/ata_piix.c
+@@ -151,6 +151,7 @@ enum piix_controller_ids {
+ piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
+ ich8_sata_snb,
+ ich8_2port_sata_snb,
++ ich8_2port_sata_byt,
+ };
+
+ struct piix_map_db {
+@@ -348,6 +349,9 @@ static const struct pci_device_id piix_p
+ { 0x8086, 0x8d60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
+ /* SATA Controller IDE (Wellsburg) */
+ { 0x8086, 0x8d68, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
++ /* SATA Controller IDE (BayTrail) */
++ { 0x8086, 0x0F20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
++ { 0x8086, 0x0F21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
+
+ { } /* terminate list */
+ };
+@@ -513,6 +517,7 @@ static const struct piix_map_db *piix_ma
+ [tolapai_sata] = &tolapai_map_db,
+ [ich8_sata_snb] = &ich8_map_db,
+ [ich8_2port_sata_snb] = &ich8_2port_map_db,
++ [ich8_2port_sata_byt] = &ich8_2port_map_db,
+ };
+
+ static struct ata_port_info piix_port_info[] = {
+@@ -663,6 +668,16 @@ static struct ata_port_info piix_port_in
+ .udma_mask = ATA_UDMA6,
+ .port_ops = &piix_sata_ops,
+ },
++
++ [ich8_2port_sata_byt] =
++ {
++ .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR | PIIX_FLAG_PIO16,
++ .pio_mask = ATA_PIO4,
++ .mwdma_mask = ATA_MWDMA2,
++ .udma_mask = ATA_UDMA6,
++ .port_ops = &piix_sata_ops,
++ },
++
+ };
+
+ static struct pci_bits piix_enable_bits[] = {
--- /dev/null
+From e771451c0a831d96a7c14b0ca8a8ec671d98567b Mon Sep 17 00:00:00 2001
+From: Vincent Pelletier <plr.vincent@gmail.com>
+Date: Sat, 18 May 2013 18:44:04 +0200
+Subject: libata: make ata_exec_internal_sg honor DMADIR
+
+From: Vincent Pelletier <plr.vincent@gmail.com>
+
+commit e771451c0a831d96a7c14b0ca8a8ec671d98567b upstream.
+
+libata honors DMADIR for regular commands, but not for internal commands
+used (among other) during device initialisation.
+
+This makes SATA-host-to-PATA-device bridges based on Silicon Image SiL3611
+(such as "Abit Serillel 2") end up disabled when used with an ATAPI device
+after a few tries.
+
+Log output of the bridge being hot-plugged with an ATAPI drive:
+
+ [ 9631.212901] ata1: exception Emask 0x10 SAct 0x0 SErr 0x40c0000 action 0xe frozen
+ [ 9631.212913] ata1: irq_stat 0x00000040, connection status changed
+ [ 9631.212923] ata1: SError: { CommWake 10B8B DevExch }
+ [ 9631.212939] ata1: hard resetting link
+ [ 9632.104962] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
+ [ 9632.106393] ata1.00: ATAPI: PIONEER DVD-RW DVR-115, 1.06, max UDMA/33
+ [ 9632.106407] ata1.00: applying bridge limits
+ [ 9632.108151] ata1.00: configured for UDMA/33
+ [ 9637.105303] ata1.00: qc timeout (cmd 0xa0)
+ [ 9637.105324] ata1.00: failed to clear UNIT ATTENTION (err_mask=0x5)
+ [ 9637.105335] ata1: hard resetting link
+ [ 9638.044599] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
+ [ 9638.047878] ata1.00: configured for UDMA/33
+ [ 9643.044933] ata1.00: qc timeout (cmd 0xa0)
+ [ 9643.044953] ata1.00: failed to clear UNIT ATTENTION (err_mask=0x5)
+ [ 9643.044963] ata1: limiting SATA link speed to 1.5 Gbps
+ [ 9643.044971] ata1.00: limiting speed to UDMA/33:PIO3
+ [ 9643.044979] ata1: hard resetting link
+ [ 9643.984225] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
+ [ 9643.987471] ata1.00: configured for UDMA/33
+ [ 9648.984591] ata1.00: qc timeout (cmd 0xa0)
+ [ 9648.984612] ata1.00: failed to clear UNIT ATTENTION (err_mask=0x5)
+ [ 9648.984619] ata1.00: disabled
+ [ 9649.000593] ata1: hard resetting link
+ [ 9649.939902] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
+ [ 9649.955864] ata1: EH complete
+
+With this patch, the drive enumerates correctly when libata is loaded with
+atapi_dmadir=1:
+
+ [ 9891.810863] ata1: exception Emask 0x10 SAct 0x0 SErr 0x40c0000 action 0xe frozen
+ [ 9891.810874] ata1: irq_stat 0x00000040, connection status changed
+ [ 9891.810884] ata1: SError: { CommWake 10B8B DevExch }
+ [ 9891.810900] ata1: hard resetting link
+ [ 9892.762105] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
+ [ 9892.763544] ata1.00: ATAPI: PIONEER DVD-RW DVR-115, 1.06, max UDMA/33, DMADIR
+ [ 9892.763558] ata1.00: applying bridge limits
+ [ 9892.765393] ata1.00: configured for UDMA/33
+ [ 9892.786063] ata1: EH complete
+ [ 9892.792062] scsi 0:0:0:0: CD-ROM PIONEER DVD-RW DVR-115 1.06 PQ: 0 ANSI: 5
+ [ 9892.798455] sr2: scsi3-mmc drive: 12x/12x writer dvd-ram cd/rw xa/form2 cdda tray
+ [ 9892.798837] sr 0:0:0:0: Attached scsi CD-ROM sr2
+ [ 9892.799109] sr 0:0:0:0: Attached scsi generic sg6 type 5
+
+Based on a patch by Csaba Halász <csaba.halasz@gmail.com> on linux-ide:
+http://marc.info/?l=linux-ide&m=136121147832295&w=2
+
+tj: minor formatting changes.
+
+Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
+Signed-off-by: Tejun Heo <tj@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/ata/libata-core.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/ata/libata-core.c
++++ b/drivers/ata/libata-core.c
+@@ -1599,6 +1599,12 @@ unsigned ata_exec_internal_sg(struct ata
+ qc->tf = *tf;
+ if (cdb)
+ memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
++
++ /* some SATA bridges need us to indicate data xfer direction */
++ if (tf->protocol == ATAPI_PROT_DMA && (dev->flags & ATA_DFLAG_DMADIR) &&
++ dma_dir == DMA_FROM_DEVICE)
++ qc->tf.feature |= ATAPI_DMADIR;
++
+ qc->flags |= ATA_QCFLAG_RESULT_TF;
+ qc->dma_dir = dma_dir;
+ if (dma_dir != DMA_NONE) {
--- /dev/null
+From df66834a43c461de2565c45d815288ba1c0def37 Mon Sep 17 00:00:00 2001
+From: Finn Thain <fthain@telegraphics.com.au>
+Date: Wed, 29 May 2013 12:37:17 +1000
+Subject: m68k/mac: Fix unexpected interrupt with CONFIG_EARLY_PRINTK
+
+From: Finn Thain <fthain@telegraphics.com.au>
+
+commit df66834a43c461de2565c45d815288ba1c0def37 upstream.
+
+The present code does not wait for the SCC to finish resetting itself
+before trying to initialise the device. The result is that the SCC
+interrupt sources become enabled (if they weren't already). This leads to
+an early boot crash (unexpected interrupt) given CONFIG_EARLY_PRINTK. Fix
+this by adding a delay. A successful reset disables the interrupt sources.
+
+Also, after the reset for channel A setup, the SCC then gets a second
+reset for channel B setup which leaves channel A uninitialised again. Fix
+this by performing the reset only once.
+
+Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
+Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/m68k/kernel/head.S | 29 +++++++++++++++++++----------
+ 1 file changed, 19 insertions(+), 10 deletions(-)
+
+--- a/arch/m68k/kernel/head.S
++++ b/arch/m68k/kernel/head.S
+@@ -2752,11 +2752,9 @@ func_return get_new_page
+ #ifdef CONFIG_MAC
+
+ L(scc_initable_mac):
+- .byte 9,12 /* Reset */
+ .byte 4,0x44 /* x16, 1 stopbit, no parity */
+ .byte 3,0xc0 /* receiver: 8 bpc */
+ .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
+- .byte 9,0 /* no interrupts */
+ .byte 10,0 /* NRZ */
+ .byte 11,0x50 /* use baud rate generator */
+ .byte 12,1,13,0 /* 38400 baud */
+@@ -2899,6 +2897,7 @@ func_start serial_init,%d0/%d1/%a0/%a1
+ is_not_mac(L(serial_init_not_mac))
+
+ #ifdef SERIAL_DEBUG
++
+ /* You may define either or both of these. */
+ #define MAC_USE_SCC_A /* Modem port */
+ #define MAC_USE_SCC_B /* Printer port */
+@@ -2908,9 +2907,21 @@ func_start serial_init,%d0/%d1/%a0/%a1
+ #define mac_scc_cha_b_data_offset 0x4
+ #define mac_scc_cha_a_data_offset 0x6
+
++#if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
++ movel %pc@(L(mac_sccbase)),%a0
++ /* Reset SCC device */
++ moveb #9,%a0@(mac_scc_cha_a_ctrl_offset)
++ moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset)
++ /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */
++ /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */
++ movel #35,%d0
++5:
++ subq #1,%d0
++ jne 5b
++#endif
++
+ #ifdef MAC_USE_SCC_A
+ /* Initialize channel A */
+- movel %pc@(L(mac_sccbase)),%a0
+ lea %pc@(L(scc_initable_mac)),%a1
+ 5: moveb %a1@+,%d0
+ jmi 6f
+@@ -2922,9 +2933,6 @@ func_start serial_init,%d0/%d1/%a0/%a1
+
+ #ifdef MAC_USE_SCC_B
+ /* Initialize channel B */
+-#ifndef MAC_USE_SCC_A /* Load mac_sccbase only if needed */
+- movel %pc@(L(mac_sccbase)),%a0
+-#endif /* MAC_USE_SCC_A */
+ lea %pc@(L(scc_initable_mac)),%a1
+ 7: moveb %a1@+,%d0
+ jmi 8f
+@@ -2933,6 +2941,7 @@ func_start serial_init,%d0/%d1/%a0/%a1
+ jra 7b
+ 8:
+ #endif /* MAC_USE_SCC_B */
++
+ #endif /* SERIAL_DEBUG */
+
+ jra L(serial_init_done)
+@@ -3006,17 +3015,17 @@ func_start serial_putc,%d0/%d1/%a0/%a1
+
+ #ifdef SERIAL_DEBUG
+
+-#ifdef MAC_USE_SCC_A
++#if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
+ movel %pc@(L(mac_sccbase)),%a1
++#endif
++
++#ifdef MAC_USE_SCC_A
+ 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
+ jeq 3b
+ moveb %d0,%a1@(mac_scc_cha_a_data_offset)
+ #endif /* MAC_USE_SCC_A */
+
+ #ifdef MAC_USE_SCC_B
+-#ifndef MAC_USE_SCC_A /* Load mac_sccbase only if needed */
+- movel %pc@(L(mac_sccbase)),%a1
+-#endif /* MAC_USE_SCC_A */
+ 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
+ jeq 4b
+ moveb %d0,%a1@(mac_scc_cha_b_data_offset)
drm-radeon-fix-card_posted-check-for-newer-asics.patch
cifs-fix-potential-buffer-overrun-when-composing-a-new-options-string.patch
usb-io_ti-fix-null-dereference-in-chase_port.patch
+ata_piix-add-pci-ids-for-intel-baytail.patch
+libata-make-ata_exec_internal_sg-honor-dmadir.patch
+m68k-mac-fix-unexpected-interrupt-with-config_early_printk.patch