* config/s390/s390.md (UNSPEC_MB): Rename from UNSPECV_MB.
(memory_barrier): Expand as unspec instead of unspec_volatile.
Remove mem:BLK from insn operands. Use Pmode scratch register.
(*memory_barrier): Define as unspec instead of unspec_volatile.
Use (match_dup 0) as input operand.
* config/sparc/sparc.md (UNSPEC_MEMBAR): Rename from UNSPECV_MEMBAR.
* config/sparc/sync.md (memory_barrier): Expand as unspec instead of
unspec_volatile. Remove mem:BLK from insn operands. Use Pmode
scratch register. Remove operand 1.
(*stbar): Define as unspec instead of unspec_volatile.
Use (match_dup 0) as input operand, remove (const_int 8).
(*membar): Define as unspec instead of unspec_volatile.
Use (match_dup 0) as input operand, remove input operand 2.
* config/xtensa/xtensa.md (UNSPEC_MEMW): Rename from UNSPECV_MEMW.
(memory_barrier): Expand as unspec instead of unspec_volatile.
Remove mem:BLK from insn operands. Use Pmode scratch register.
(*memory_barrier): Define as unspec instead of unspec_volatile.
Use (match_dup 0) as input operand.
* config/ia64/sync.md (memory_barrier): Redefine as expander pattern.
Remove mem:BLK from insn operands. Use Pmode scratch register.
Set volatile flag on operand 0.
(*memory_barrier): New insn pattern.
* config/rs6000/sync.md (memory_barrier): Remove mem:BLK from
insn operands.
(*memory_barrier): Use (match_dup 0) as input operand.
* config/mips/sync.md (memory_barrier): Redefine as expander pattern.
Remove mem:BLK from insn operands. Use Pmode scratch register.
Set volatile flag on operand 0.
(*memory_barrier): New insn pattern.
* config/alpha/sync.md (*memory_barrier): Rename from *mb_internal.
From-SVN: r143047
+2009-01-04 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/s390/s390.md (UNSPEC_MB): Rename from UNSPECV_MB.
+ (memory_barrier): Expand as unspec instead of unspec_volatile.
+ Remove mem:BLK from insn operands. Use Pmode scratch register.
+ (*memory_barrier): Define as unspec instead of unspec_volatile.
+ Use (match_dup 0) as input operand.
+
+ * config/sparc/sparc.md (UNSPEC_MEMBAR): Rename from UNSPECV_MEMBAR.
+ * config/sparc/sync.md (memory_barrier): Expand as unspec instead of
+ unspec_volatile. Remove mem:BLK from insn operands. Use Pmode
+ scratch register. Remove operand 1.
+ (*stbar): Define as unspec instead of unspec_volatile.
+ Use (match_dup 0) as input operand, remove (const_int 8).
+ (*membar): Define as unspec instead of unspec_volatile.
+ Use (match_dup 0) as input operand, remove input operand 2.
+
+ * config/xtensa/xtensa.md (UNSPEC_MEMW): Rename from UNSPECV_MEMW.
+ (memory_barrier): Expand as unspec instead of unspec_volatile.
+ Remove mem:BLK from insn operands. Use Pmode scratch register.
+ (*memory_barrier): Define as unspec instead of unspec_volatile.
+ Use (match_dup 0) as input operand.
+
+ * config/ia64/sync.md (memory_barrier): Redefine as expander pattern.
+ Remove mem:BLK from insn operands. Use Pmode scratch register.
+ Set volatile flag on operand 0.
+ (*memory_barrier): New insn pattern.
+
+ * config/rs6000/sync.md (memory_barrier): Remove mem:BLK from
+ insn operands.
+ (*memory_barrier): Use (match_dup 0) as input operand.
+
+ * config/mips/sync.md (memory_barrier): Redefine as expander pattern.
+ Remove mem:BLK from insn operands. Use Pmode scratch register.
+ Set volatile flag on operand 0.
+ (*memory_barrier): New insn pattern.
+
+ * config/alpha/sync.md (*memory_barrier): Rename from *mb_internal.
+
2009-01-04 Steven Bosscher <steven@gcc.gnu.org>
PR middle-end/38586
MEM_VOLATILE_P (operands[0]) = 1;
})
-(define_insn "*mb_internal"
+(define_insn "*memory_barrier"
[(set (match_operand:BLK 0 "" "")
(unspec:BLK [(match_dup 0)] UNSPEC_MB))]
""
(define_code_attr fetchop_name
[(plus "add") (minus "sub") (ior "ior") (xor "xor") (and "and")])
-(define_insn "memory_barrier"
- [(set (mem:BLK (match_scratch:DI 0 "X"))
- (unspec:BLK [(mem:BLK (match_scratch:DI 1 "X"))] UNSPEC_MF))]
+(define_expand "memory_barrier"
+ [(set (match_dup 0)
+ (unspec:BLK [(match_dup 0)] UNSPEC_MF))]
+ ""
+{
+ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
+ MEM_VOLATILE_P (operands[0]) = 1;
+})
+
+(define_insn "*memory_barrier"
+ [(set (match_operand:BLK 0 "" "")
+ (unspec:BLK [(match_dup 0)] UNSPEC_MF))]
""
"mf"
[(set_attr "itanium_class" "syst_m")])
;; Atomic memory operations.
-(define_insn "memory_barrier"
- [(set (mem:BLK (scratch))
- (unspec:BLK [(const_int 0)] UNSPEC_MEMORY_BARRIER))]
+(define_expand "memory_barrier"
+ [(set (match_dup 0)
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))]
+ "GENERATE_SYNC"
+{
+ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
+ MEM_VOLATILE_P (operands[0]) = 1;
+})
+
+(define_insn "*mb_internal"
+ [(set (match_operand:BLK 0 "" "")
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))]
"GENERATE_SYNC"
"%|sync%-")
[(plus "rIL") (minus "r") (ior "rKJF") (xor "rKJF") (and "rSTKJ")])
(define_expand "memory_barrier"
- [(set (mem:BLK (match_dup 0))
- (unspec:BLK [(mem:BLK (match_dup 0))] UNSPEC_SYNC))]
+ [(set (match_dup 0)
+ (unspec:BLK [(match_dup 0)] UNSPEC_SYNC))]
""
{
operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
(define_insn "*sync_internal"
[(set (match_operand:BLK 0 "" "")
- (unspec:BLK [(match_operand:BLK 1 "" "")] UNSPEC_SYNC))]
+ (unspec:BLK [(match_dup 0)] UNSPEC_SYNC))]
""
"{dcs|sync}"
[(set_attr "type" "sync")])
(UNSPEC_INSN 213)
(UNSPEC_EXECUTE 214)
+ ; Atomic Support
+ (UNSPEC_MB 400)
+
; TLS relocation specifiers
(UNSPEC_TLSGD 500)
(UNSPEC_TLSLDM 501)
(UNSPECV_SET_TP 500)
; Atomic Support
- (UNSPECV_MB 700)
- (UNSPECV_CAS 701)
+ (UNSPECV_CAS 700)
])
;;
;
(define_expand "memory_barrier"
- [(set (mem:BLK (match_dup 0))
- (unspec_volatile:BLK [(mem:BLK (match_dup 0))] UNSPECV_MB))]
+ [(set (match_dup 0)
+ (unspec:BLK [(match_dup 0)] UNSPEC_MB))]
""
{
- operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (DImode));
+ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
MEM_VOLATILE_P (operands[0]) = 1;
})
(define_insn "*memory_barrier"
[(set (match_operand:BLK 0 "" "")
- (unspec_volatile:BLK [(match_operand:BLK 1 "" "")] UNSPECV_MB))]
+ (unspec:BLK [(match_dup 0)] UNSPEC_MB))]
""
"bcr\t15,0"
[(set_attr "op_type" "RR")])
+
; Although bcr is superscalar on Z10, this variant will never become part of
; an execution group.
(UNSPEC_EMB_TEXTULO 15)
(UNSPEC_EMB_SETHM 18)
+ (UNSPEC_MEMBAR 20)
+
(UNSPEC_TLSGD 30)
(UNSPEC_TLSLDM 31)
(UNSPEC_TLSLDO 32)
(UNSPECV_FLUSH 4)
(UNSPECV_SETJMP 5)
(UNSPECV_SAVEW 6)
- (UNSPECV_MEMBAR 7)
(UNSPECV_CAS 8)
(UNSPECV_SWAP 9)
(UNSPECV_LDSTUB 10)
(define_mode_attr modesuffix [(SI "") (DI "x")])
(define_expand "memory_barrier"
- [(set (mem:BLK (match_dup 0))
- (unspec_volatile:BLK [(mem:BLK (match_dup 0)) (match_dup 1)]
- UNSPECV_MEMBAR))]
+ [(set (match_dup 0)
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMBAR))]
"TARGET_V8 || TARGET_V9"
{
- operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (DImode));
+ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
MEM_VOLATILE_P (operands[0]) = 1;
- if (TARGET_V9)
- /* member #StoreStore | #LoadStore | #StoreLoad | #LoadLoad */
- operands[1] = GEN_INT (15);
- else
- /* stbar */
- operands[1] = GEN_INT (8);
+
})
(define_insn "*stbar"
[(set (match_operand:BLK 0 "" "")
- (unspec_volatile:BLK [(match_operand:BLK 1 "" "")
- (const_int 8)] UNSPECV_MEMBAR))]
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMBAR))]
"TARGET_V8"
"stbar"
[(set_attr "type" "multi")])
+;; membar #StoreStore | #LoadStore | #StoreLoad | #LoadLoad
(define_insn "*membar"
[(set (match_operand:BLK 0 "" "")
- (unspec_volatile:BLK [(match_operand:BLK 1 "" "")
- (match_operand:SI 2 "immediate_operand" "I")]
- UNSPECV_MEMBAR))]
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMBAR))]
"TARGET_V9"
- "membar\t%2"
+ "membar\t15"
[(set_attr "type" "multi")])
(define_expand "sync_compare_and_swap<mode>"
(UNSPEC_TLS_ARG 8)
(UNSPEC_TLS_CALL 9)
(UNSPEC_TP 10)
+ (UNSPEC_MEMW 11)
(UNSPECV_SET_FP 1)
(UNSPECV_ENTRY 2)
- (UNSPECV_MEMW 3)
(UNSPECV_S32RI 4)
(UNSPECV_S32C1I 5)
(UNSPECV_EH_RETURN 6)
;; Atomic operations
(define_expand "memory_barrier"
- [(set (mem:BLK (match_dup 0))
- (unspec_volatile:BLK [(mem:BLK (match_dup 0))] UNSPECV_MEMW))]
+ [(set (match_dup 0)
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMW))]
""
{
- operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (SImode));
+ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
MEM_VOLATILE_P (operands[0]) = 1;
})
(define_insn "*memory_barrier"
[(set (match_operand:BLK 0 "" "")
- (unspec_volatile:BLK [(match_operand:BLK 1 "" "")] UNSPECV_MEMW))]
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMW))]
""
"memw"
[(set_attr "type" "unknown")