if (target == 0)
target = gen_reg_rtx (QImode);
- pat = gen_rtx_EQ (QImode, gen_rtx_REG (CCZmode, FLAGS_REG),
- const0_rtx);
- emit_insn (gen_rtx_SET (target, pat));
+ /* NB: For aesenc/aesdec keylocker insn, ZF will be set when runtime
+ error occurs. Then the output should be cleared for safety. */
+ rtx_code_label *ok_label;
+ rtx tmp;
+
+ tmp = gen_rtx_REG (CCZmode, FLAGS_REG);
+ pat = gen_rtx_EQ (QImode, tmp, const0_rtx);
+ ok_label = gen_label_rtx ();
+ emit_cmp_and_jump_insns (tmp, const0_rtx, NE, 0, GET_MODE (tmp),
+ true, ok_label);
+ /* Usually the runtime error seldom occur, so predict OK path as
+ hotspot to optimize it as fallthrough block. */
+ predict_jump (REG_BR_PROB_BASE * 90 / 100);
+
+ emit_insn (gen_rtx_SET (op1, const0_rtx));
+ emit_label (ok_label);
+ emit_insn (gen_rtx_SET (target, pat));
emit_insn (gen_rtx_SET (op0, op1));
return target;
if (target == 0)
target = gen_reg_rtx (QImode);
- pat = gen_rtx_EQ (QImode, gen_rtx_REG (CCZmode, FLAGS_REG),
- const0_rtx);
+ tmp = gen_rtx_REG (CCZmode, FLAGS_REG);
+ pat = gen_rtx_EQ (QImode, tmp, const0_rtx);
+ ok_label = gen_label_rtx ();
+ emit_cmp_and_jump_insns (tmp, const0_rtx, NE, 0, GET_MODE (tmp),
+ true, ok_label);
+ predict_jump (REG_BR_PROB_BASE * 90 / 100);
+
+ for (i = 0; i < 8; i++)
+ emit_insn (gen_rtx_SET (xmm_regs[i], const0_rtx));
+
+ emit_label (ok_label);
emit_insn (gen_rtx_SET (target, pat));
for (i = 0; i < 8; i++)
/* { dg-options "-mkl -O2" } */
/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */
/* { dg-final { scan-assembler "aesdec128kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */
+/* { dg-final { scan-assembler "j\[ez\]" } } */
/* { dg-final { scan-assembler "sete" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */
#include <immintrin.h>
/* { dg-options "-mkl -O2" } */
/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */
/* { dg-final { scan-assembler "aesdec256kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */
+/* { dg-final { scan-assembler "j\[ez\]" } } */
/* { dg-final { scan-assembler "sete" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */
#include <immintrin.h>
/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */
/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */
/* { dg-final { scan-assembler "aesdecwide128kl\[ \\t\]+\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "j\[ez\]" } } */
/* { dg-final { scan-assembler "sete" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm1, %xmm1" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm2, %xmm2" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm3, %xmm3" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm4, %xmm4" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm5, %xmm5" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm6, %xmm6" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm7, %xmm7" } } */
#include <immintrin.h>
/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */
/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */
/* { dg-final { scan-assembler "aesdecwide256kl\[ \\t\]+\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "j\[ez\]" } } */
/* { dg-final { scan-assembler "sete" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm1, %xmm1" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm2, %xmm2" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm3, %xmm3" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm4, %xmm4" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm5, %xmm5" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm6, %xmm6" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm7, %xmm7" } } */
#include <immintrin.h>
/* { dg-options "-mkl -O2" } */
/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */
/* { dg-final { scan-assembler "aesenc128kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */
+/* { dg-final { scan-assembler "j\[ez\]" } } */
/* { dg-final { scan-assembler "sete" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */
#include <immintrin.h>
/* { dg-options "-mkl -O2" } */
/* { dg-final { scan-assembler "movdqa\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */
/* { dg-final { scan-assembler "aesenc256kl\[ \\t\]+\[^\\n\\r\]*, %xmm0" } } */
+/* { dg-final { scan-assembler "j\[ez\]" } } */
/* { dg-final { scan-assembler "sete" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */
#include <immintrin.h>
/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */
/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */
/* { dg-final { scan-assembler "aesencwide128kl\[ \\t\]+\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "j\[ez\]" } } */
/* { dg-final { scan-assembler "sete" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm1, %xmm1" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm2, %xmm2" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm3, %xmm3" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm4, %xmm4" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm5, %xmm5" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm6, %xmm6" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm7, %xmm7" } } */
#include <immintrin.h>
/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*96\[^\\n\\r\]*, %xmm6" } } */
/* { dg-final { scan-assembler "movdqu\[ \\t\]+\[^\\n\\r\]*112\[^\\n\\r\]*, %xmm7" } } */
/* { dg-final { scan-assembler "aesencwide256kl\[ \\t\]+\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "j\[ez\]" } } */
/* { dg-final { scan-assembler "sete" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm0,\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm1,\[^\\n\\r\]*16\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm5,\[^\\n\\r\]*80\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm6,\[^\\n\\r\]*96\[^\\n\\r\]*" } } */
/* { dg-final { scan-assembler "(?:movdqu|movups)\[ \\t\]+\[^\\n\\r\]*%xmm7,\[^\\n\\r\]*112\[^\\n\\r\]*" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm0, %xmm0" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm1, %xmm1" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm2, %xmm2" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm3, %xmm3" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm4, %xmm4" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm5, %xmm5" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm6, %xmm6" } } */
+/* { dg-final { scan-assembler "pxor\[ \t\]+%xmm7, %xmm7" } } */
#include <immintrin.h>