ARM: dts: imx6ul-geam: fix fsl,pins property in tscgrp pinctrl

The property is "fsl,pins", not "fsl,pin".  Wrong property means the pin
configuration was not applied.  Fixes dtbs_check warnings:

  imx6ul-geam.dtb: pinctrl@20e0000: tscgrp: 'fsl,pins' is a required property
  imx6ul-geam.dtb: pinctrl@20e0000: tscgrp: 'fsl,pin' does not match any of the regexes: 'pinctrl-[0-9]+'

Cc: stable@vger.kernel.org
Fixes: a58e4e608bc8 ("ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts
index cdbb8c435cd6aa54036b646a39f3fd7873aec0fb..601d89b904cdfb1c704c2e5ae4e4bf7bdd435b6b 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts
@@ -365,7 +365,7 @@
        };
 
        pinctrl_tsc: tscgrp {
-               fsl,pin = <
+               fsl,pins = <
                        MX6UL_PAD_GPIO1_IO01__GPIO1_IO01        0xb0
                        MX6UL_PAD_GPIO1_IO02__GPIO1_IO02        0xb0
                        MX6UL_PAD_GPIO1_IO03__GPIO1_IO03        0xb0