]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/xe: Add atomic_svm_timeslice_ms debugfs entry
authorMatthew Brost <matthew.brost@intel.com>
Mon, 12 May 2025 13:54:59 +0000 (06:54 -0700)
committerMatthew Brost <matthew.brost@intel.com>
Mon, 12 May 2025 20:49:18 +0000 (13:49 -0700)
Add some informal control for atomic SVM fault GPU timeslice to be able
to play around with values and tweak performance.

v2:
 - Reduce timeslice default value to 5ms

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Link: https://lore.kernel.org/r/20250512135500.1405019-6-matthew.brost@intel.com
drivers/gpu/drm/xe/xe_debugfs.c
drivers/gpu/drm/xe/xe_device.c
drivers/gpu/drm/xe/xe_device_types.h
drivers/gpu/drm/xe/xe_svm.c

index d0503959a8ed09c3f5d5f514ca75e2d4d5c639e7..d83cd6ed3fa8a798129194eb37d66d5361146528 100644 (file)
@@ -191,6 +191,41 @@ static const struct file_operations wedged_mode_fops = {
        .write = wedged_mode_set,
 };
 
+static ssize_t atomic_svm_timeslice_ms_show(struct file *f, char __user *ubuf,
+                                           size_t size, loff_t *pos)
+{
+       struct xe_device *xe = file_inode(f)->i_private;
+       char buf[32];
+       int len = 0;
+
+       len = scnprintf(buf, sizeof(buf), "%d\n", xe->atomic_svm_timeslice_ms);
+
+       return simple_read_from_buffer(ubuf, size, pos, buf, len);
+}
+
+static ssize_t atomic_svm_timeslice_ms_set(struct file *f,
+                                          const char __user *ubuf,
+                                          size_t size, loff_t *pos)
+{
+       struct xe_device *xe = file_inode(f)->i_private;
+       u32 atomic_svm_timeslice_ms;
+       ssize_t ret;
+
+       ret = kstrtouint_from_user(ubuf, size, 0, &atomic_svm_timeslice_ms);
+       if (ret)
+               return ret;
+
+       xe->atomic_svm_timeslice_ms = atomic_svm_timeslice_ms;
+
+       return size;
+}
+
+static const struct file_operations atomic_svm_timeslice_ms_fops = {
+       .owner = THIS_MODULE,
+       .read = atomic_svm_timeslice_ms_show,
+       .write = atomic_svm_timeslice_ms_set,
+};
+
 void xe_debugfs_register(struct xe_device *xe)
 {
        struct ttm_device *bdev = &xe->ttm;
@@ -211,6 +246,9 @@ void xe_debugfs_register(struct xe_device *xe)
        debugfs_create_file("wedged_mode", 0600, root, xe,
                            &wedged_mode_fops);
 
+       debugfs_create_file("atomic_svm_timeslice_ms", 0600, root, xe,
+                           &atomic_svm_timeslice_ms_fops);
+
        for (mem_type = XE_PL_VRAM0; mem_type <= XE_PL_VRAM1; ++mem_type) {
                man = ttm_manager_type(bdev, mem_type);
 
index 399ae5f40321a2da164b7b04f862bb5a47991532..d4b6e623aa48b778f06e8dc8ca56d5f18b122f66 100644 (file)
@@ -442,6 +442,7 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
        xe->info.devid = pdev->device;
        xe->info.revid = pdev->revision;
        xe->info.force_execlist = xe_modparam.force_execlist;
+       xe->atomic_svm_timeslice_ms = 5;
 
        err = xe_irq_init(xe);
        if (err)
index 495bc00ebed4c8ed6e0270df0ae3a693adee8f8e..59babadeb9d177140464fb7020a03d7a1c7cefa7 100644 (file)
@@ -571,6 +571,9 @@ struct xe_device {
        /** @pmu: performance monitoring unit */
        struct xe_pmu pmu;
 
+       /** @atomic_svm_timeslice_ms: Atomic SVM fault timeslice MS */
+       u32 atomic_svm_timeslice_ms;
+
 #ifdef TEST_VM_OPS_ERROR
        /**
         * @vm_inject_error_position: inject errors at different places in VM
index d934df622276a690b0aa41fe77ca06d2b713de35..ab88b4194e574dae462f97ed9a32641f2601267d 100644 (file)
@@ -798,7 +798,8 @@ int xe_svm_handle_pagefault(struct xe_vm *vm, struct xe_vma *vma,
                .devmem_only = atomic && IS_DGFX(vm->xe) &&
                        IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR),
                .timeslice_ms = atomic && IS_DGFX(vm->xe) &&
-                       IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR) ? 5 : 0,
+                       IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR) ?
+                       vm->xe->atomic_svm_timeslice_ms : 0,
        };
        struct xe_svm_range *range;
        struct drm_gpusvm_range *r;