]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ASoC: dt-bindings: xlnx,audio-formatter: Convert to json-schema
authorVincenzo Frascino <vincenzo.frascino@arm.com>
Wed, 26 Feb 2025 12:23:23 +0000 (12:23 +0000)
committerMark Brown <broonie@kernel.org>
Wed, 26 Feb 2025 12:36:58 +0000 (12:36 +0000)
Convert the Xilinx Audio Formatter 1.0  device tree binding documentation
to json-schema.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Link: https://patch.msgid.link/20250226122325.2014547-3-vincenzo.frascino@arm.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt [deleted file]
Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt b/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.txt
deleted file mode 100644 (file)
index cbc93c8..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-Device-Tree bindings for Xilinx PL audio formatter
-
-The IP core supports DMA, data formatting(AES<->PCM conversion)
-of audio samples.
-
-Required properties:
- - compatible: "xlnx,audio-formatter-1.0"
- - interrupt-names: Names specified to list of interrupts in same
-                   order mentioned under "interrupts".
-                   List of supported interrupt names are:
-                   "irq_mm2s" : interrupt from MM2S block
-                   "irq_s2mm" : interrupt from S2MM block
- - interrupts-parent: Phandle for interrupt controller.
- - interrupts: List of Interrupt numbers.
- - reg: Base address and size of the IP core instance.
- - clock-names: List of input clocks.
-   Required elements: "s_axi_lite_aclk", "aud_mclk"
- - clocks: Input clock specifier. Refer to common clock bindings.
-
-Example:
-       audio_ss_0_audio_formatter_0: audio_formatter@80010000 {
-               compatible = "xlnx,audio-formatter-1.0";
-               interrupt-names = "irq_mm2s", "irq_s2mm";
-               interrupt-parent = <&gic>;
-               interrupts = <0 104 4>, <0 105 4>;
-               reg = <0x0 0x80010000 0x0 0x1000>;
-               clock-names = "s_axi_lite_aclk", "aud_mclk";
-               clocks = <&clk 71>, <&clk_wiz_1 0>;
-       };
diff --git a/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml b/Documentation/devicetree/bindings/sound/xlnx,audio-formatter.yaml
new file mode 100644 (file)
index 0000000..82fa448
--- /dev/null
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/xlnx,audio-formatter.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx PL audio formatter
+
+description:
+  The IP core supports DMA, data formatting(AES<->PCM conversion)
+  of audio samples.
+
+maintainers:
+  - Vincenzo Frascino <vincenzo.frascino@arm.com>
+
+allOf:
+  - $ref: dai-common.yaml#
+
+properties:
+  compatible:
+    enum:
+      - xlnx,audio-formatter-1.0
+
+  reg:
+    maxItems: 1
+
+  interrupt-names:
+    minItems: 1
+    items:
+      - const: irq_mm2s
+      - const: irq_s2mm
+
+  interrupts:
+    minItems: 1
+    items:
+      - description: interrupt from MM2S block
+      - description: interrupt from S2MM block
+
+  clock-names:
+    minItems: 1
+    items:
+      - const: s_axi_lite_aclk
+      - const: aud_mclk
+
+  clocks:
+    minItems: 1
+    items:
+      - description: clock for the axi data stream
+      - description: clock for the MEMS microphone data stream
+
+required:
+  - compatible
+  - reg
+  - interrupt-names
+  - interrupts
+  - clock-names
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    audio_formatter@80010000 {
+      compatible = "xlnx,audio-formatter-1.0";
+      reg = <0x80010000 0x1000>;
+      interrupt-names = "irq_mm2s", "irq_s2mm";
+      interrupt-parent = <&gic>;
+      interrupts = <0 104 4>, <0 105 4>;
+      clock-names = "s_axi_lite_aclk", "aud_mclk";
+      clocks = <&clk 71>, <&clk_wiz_1 0>;
+    };
+...