aarch64: Add support for the id_aa64isar3_el1 system register

Hi,

[PATCH][Binutils] aarch64: Add support for the id_aa64isar3_el1 system register

AArch64 defines a read-only system register called id_aa64isar3_el1.
This patch also adds relevant tests.

Regression tested on the aarch64-none-elf and aarch64-none-linux-gnu targets
and no regressions was found.

Is this Ok for trunk? I do not have commit rights, if OK, can someone commit on my behalf?

Thanks,
Yury Khrustalev

From e42c835e8f2ee81150f498675f2faf108bbe79f8 Mon Sep 17 00:00:00 2001
From: Yury Khrustalev <yury.khrustalev@arm.com>
Date: Tue, 6 Feb 2024 11:05:39 +0000
Subject: [PATCH] [PATCH][Binutils] aarch64: Add support for the
 id_aa64isar3_el1 system register

AArch64 defines a read-only system register called id_aa64isar3_el1.
This patch also adds relevant tests.

Regression tested on the aarch64-none-elf and aarch64-none-linux-gnu targets
and no regressions was found.

diff --git a/gas/testsuite/gas/aarch64/sysreg-diagnostic.d b/gas/testsuite/gas/aarch64/sysreg-diagnostic.d
index 7059fbe3c8e9343a2c8323ff0ad79bd932a1457f..55cdf09bb806d0f3fe76917b7550398c82e94c13 100644 (file)
--- a/gas/testsuite/gas/aarch64/sysreg-diagnostic.d
+++ b/gas/testsuite/gas/aarch64/sysreg-diagnostic.d
@@ -13,3 +13,4 @@ Disassembly of section \.text:
 .*:    d5330503        mrs     x3, dbgdtrrx_el0
 .*:    d5180003        msr     midr_el1, x3  // note: writing to a read-only register
 .*:    d5180640        msr     id_aa64isar2_el1, x0  // note: writing to a read-only register
+.*:    d5180660        msr     id_aa64isar3_el1, x0  // note: writing to a read-only register

diff --git a/gas/testsuite/gas/aarch64/sysreg-diagnostic.l b/gas/testsuite/gas/aarch64/sysreg-diagnostic.l
index e9a41a2a3d2546834ba4f35fbdc721c055e735ba..df3d3e572a951ae0cc71b4b10cf749bfaa1853db 100644 (file)
--- a/gas/testsuite/gas/aarch64/sysreg-diagnostic.l
+++ b/gas/testsuite/gas/aarch64/sysreg-diagnostic.l
@@ -3,3 +3,4 @@
 .*:5: Warning: specified register cannot be read from at operand 2 -- `mrs x3,dbgdtrtx_el0'
 .*:6: Warning: specified register cannot be written to at operand 1 -- `msr midr_el1,x3'
 .*:7: Warning: specified register cannot be written to at operand 1 -- `msr id_aa64isar2_el1,x0'
+.*:8: Warning: specified register cannot be written to at operand 1 -- `msr id_aa64isar3_el1,x0'

diff --git a/gas/testsuite/gas/aarch64/sysreg-diagnostic.s b/gas/testsuite/gas/aarch64/sysreg-diagnostic.s
index a689cdceae54770d2f3092907f792e74a6ab4708..d8e48c682a53f5be7ced056793619c97e9cc94ae 100644 (file)
--- a/gas/testsuite/gas/aarch64/sysreg-diagnostic.s
+++ b/gas/testsuite/gas/aarch64/sysreg-diagnostic.s
@@ -5,3 +5,4 @@
        mrs     x3, dbgdtrtx_el0
        msr     midr_el1, x3
        msr     id_aa64isar2_el1, x0
+       msr     id_aa64isar3_el1, x0

diff --git a/gas/testsuite/gas/aarch64/sysreg.d b/gas/testsuite/gas/aarch64/sysreg.d
index 704666d48c8b6aebf3c4fe4e987cc81f32ec0335..d10175837f28f2a94a74f799faef2113dd0e9417 100644 (file)
--- a/gas/testsuite/gas/aarch64/sysreg.d
+++ b/gas/testsuite/gas/aarch64/sysreg.d
@@ -31,3 +31,5 @@ Disassembly of section \.text:
   5c:  d5110300        msr     trcstatr, x0
   60:  d5380640        mrs     x0, id_aa64isar2_el1
   64:  d538065e        mrs     x30, id_aa64isar2_el1
+  68:  d5380660        mrs     x0, id_aa64isar3_el1
+  6c:  d538067e        mrs     x30, id_aa64isar3_el1

diff --git a/gas/testsuite/gas/aarch64/sysreg.s b/gas/testsuite/gas/aarch64/sysreg.s
index f2e75a863a1f592dbbfb8cbbe083ed342c04c1d4..a3f5b79362085adbbdbee606a33a126db25da72f 100644 (file)
--- a/gas/testsuite/gas/aarch64/sysreg.s
+++ b/gas/testsuite/gas/aarch64/sysreg.s
@@ -33,3 +33,6 @@
 
        mrs x0, id_aa64isar2_el1
        mrs x30, id_aa64isar2_el1
+
+       mrs x0, id_aa64isar3_el1
+       mrs x30, id_aa64isar3_el1

diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
index 6a948171d6e47077383168db83294d80f5862733..8b65673a5d60b8124fa82cf11808e214a5fd3780 100644 (file)
--- a/opcodes/aarch64-sys-regs.def
+++ b/opcodes/aarch64-sys-regs.def
@@ -521,6 +521,7 @@
   SYSREG ("id_aa64isar0_el1",  CPENC (3,0,0,6,0),      F_REG_READ,             AARCH64_NO_FEATURES)
   SYSREG ("id_aa64isar1_el1",  CPENC (3,0,0,6,1),      F_REG_READ,             AARCH64_NO_FEATURES)
   SYSREG ("id_aa64isar2_el1",  CPENC (3,0,0,6,2),      F_REG_READ,             AARCH64_NO_FEATURES)
+  SYSREG ("id_aa64isar3_el1",  CPENC (3,0,0,6,3),      F_REG_READ,             AARCH64_NO_FEATURES)
   SYSREG ("id_aa64mmfr0_el1",  CPENC (3,0,0,7,0),      F_REG_READ,             AARCH64_NO_FEATURES)
   SYSREG ("id_aa64mmfr1_el1",  CPENC (3,0,0,7,1),      F_REG_READ,             AARCH64_NO_FEATURES)
   SYSREG ("id_aa64mmfr2_el1",  CPENC (3,0,0,7,2),      F_REG_READ,             AARCH64_NO_FEATURES)