arm64: dts: rockchip: convert rk3528 power-domains to dt-binding constants

Now that the binding head has been merged, convert the power-domain ids
back to these constants for easier handling.

Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250620201715.1572609-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index 001a555c83b7526d49a156ece06e749cc7697918..54fa8089c4d38f8d40a793e412a26cadfaa5f184 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/clock/rockchip,rk3528-cru.h>
+#include <dt-bindings/power/rockchip,rk3528-power.h>
 #include <dt-bindings/reset/rockchip,rk3528-cru.h>
 
 / {
@@ -480,8 +481,8 @@
                                #size-cells = <0>;
 
                                /* These power domains are grouped by VD_GPU */
-                               power-domain@4 {
-                                       reg = <4>;
+                               power-domain@RK3528_PD_GPU {
+                                       reg = <RK3528_PD_GPU>;
                                        clocks = <&cru ACLK_GPU_MALI>,
                                                 <&cru PCLK_GPU_ROOT>;
                                        pm_qos = <&qos_gpu_m0>,
@@ -490,20 +491,20 @@
                                };
 
                                /* These power domains are grouped by VD_LOGIC */
-                               power-domain@5 {
-                                       reg = <5>;
+                               power-domain@RK3528_PD_RKVDEC {
+                                       reg = <RK3528_PD_RKVDEC>;
                                        pm_qos = <&qos_rkvdec>;
                                        #power-domain-cells = <0>;
                                        status = "disabled";
                                };
-                               power-domain@6 {
-                                       reg = <6>;
+                               power-domain@RK3528_PD_RKVENC {
+                                       reg = <RK3528_PD_RKVENC>;
                                        pm_qos = <&qos_rkvenc>;
                                        #power-domain-cells = <0>;
                                        status = "disabled";
                                };
-                               power-domain@7 {
-                                       reg = <7>;
+                               power-domain@RK3528_PD_VO {
+                                       reg = <RK3528_PD_VO>;
                                        pm_qos = <&qos_gmac0>,
                                                 <&qos_hdcp>,
                                                 <&qos_jpegdec>,
@@ -516,8 +517,8 @@
                                        #power-domain-cells = <0>;
                                        status = "disabled";
                                };
-                               power-domain@8 {
-                                       reg = <8>;
+                               power-domain@RK3528_PD_VPU {
+                                       reg = <RK3528_PD_VPU>;
                                        pm_qos = <&qos_emmc>,
                                                 <&qos_fspi>,
                                                 <&qos_gmac1>,
@@ -556,7 +557,7 @@
                                          "pp1",
                                          "ppmmu1";
                        operating-points-v2 = <&gpu_opp_table>;
-                       power-domains = <&power 4>;
+                       power-domains = <&power RK3528_PD_GPU>;
                        resets = <&cru SRST_A_GPU>;
                        status = "disabled";
                };