RISC-V: Refactor vxrm_mode attr for type attr equal

This patch would like to refactor the vxrm_mode attr for duplicated
eq_attr condition. The common condition of attr is extraced to one
place instead of many places.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

	* config/riscv/vector.md: Refactor the common condition.

diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 5e489dc91ba32cf336c17d9b9ee78aa1feee779b..a6174f9483e64c7c8110401c524005a11a87aa76 100644 (file)
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -445,22 +445,29 @@
 ;; Defines rounding mode of an fixed-point operation.
 
 (define_attr "vxrm_mode" "rnu,rne,rdn,rod,none"
-  (cond [(and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-             (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RNU"))
-        (const_string "rnu")
-
-        (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-             (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RNE"))
-        (const_string "rne")
-
-        (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-             (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_RDN"))
-        (const_string "rdn")
-
-        (and (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
-             (match_test "INTVAL(operands[9]) == riscv_vector::VXRM_ROD"))
-        (const_string "rod")]
-        (const_string "none")))
+  (cond
+    [
+      (eq_attr "type" "vsalu,vaalu,vsmul,vsshift,vnclip")
+      (cond
+       [
+         (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RNU")
+         (const_string "rnu")
+
+         (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RNE")
+         (const_string "rne")
+
+         (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_RDN")
+         (const_string "rdn")
+
+         (match_test "INTVAL (operands[9]) == riscv_vector::VXRM_ROD")
+         (const_string "rod")
+       ]
+       (const_string "none")
+      )
+    ]
+    (const_string "none")
+  )
+)
 
 ;; Defines rounding mode of an floating-point operation.
 (define_attr "frm_mode" "rne,rtz,rdn,rup,rmm,dyn,none"