]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
wifi: ath12k: Fix endianness issue in struct hal_tlv_64_hdr
authorP Praneesh <quic_ppranees@quicinc.com>
Tue, 19 Nov 2024 16:45:16 +0000 (22:15 +0530)
committerJeff Johnson <quic_jjohnson@quicinc.com>
Thu, 21 Nov 2024 15:52:49 +0000 (07:52 -0800)
struct hal_tlv_64_hdr has a 64-bit member that should be in little-endian
format, but the current definition uses host byte order. Fix this by
changing the definition and updating the corresponding helper functions
used for the byte order conversion.

Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.3.1-00173-QCAHKSWPL_SILICONZ-1

Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Acked-by: Kalle Valo <kvalo@kernel.org>
Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
Link: https://patch.msgid.link/20241119164516.756478-1-quic_ppranees@quicinc.com
Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
drivers/net/wireless/ath/ath12k/dp_rx.c
drivers/net/wireless/ath/ath12k/hal_desc.h
drivers/net/wireless/ath/ath12k/hal_rx.c

index 9ae579e505572969c8c14e44939f039f6da91ea3..0fb39c174475d97e866f813ec5c9d87e25ed1bd5 100644 (file)
@@ -3912,7 +3912,7 @@ void ath12k_dp_rx_process_reo_status(struct ath12k_base *ab)
        ath12k_hal_srng_access_begin(ab, srng);
 
        while ((hdr = ath12k_hal_srng_dst_get_next_entry(ab, srng))) {
-               tag = u64_get_bits(hdr->tl, HAL_SRNG_TLV_HDR_TAG);
+               tag = le64_get_bits(hdr->tl, HAL_SRNG_TLV_HDR_TAG);
 
                switch (tag) {
                case HAL_REO_GET_QUEUE_STATS_STATUS:
index 739f73370015e20f98025dc098bf57fe972e4abb..a460d432288fa1c716a9bc722fb2817ff7091fc0 100644 (file)
@@ -581,7 +581,7 @@ struct hal_tlv_hdr {
 #define HAL_TLV_64_HDR_LEN             GENMASK(21, 10)
 
 struct hal_tlv_64_hdr {
-       u64 tl;
+       __le64 tl;
        u8 value[];
 } __packed;
 
index f7c1aaa3b5d47fe766be8e83c3bdf714ba099c9a..ac17d6223fa7f22c9ea572773fe9d45e2218211f 100644 (file)
@@ -26,8 +26,8 @@ static int ath12k_hal_reo_cmd_queue_stats(struct hal_tlv_64_hdr *tlv,
 {
        struct hal_reo_get_queue_stats *desc;
 
-       tlv->tl = u32_encode_bits(HAL_REO_GET_QUEUE_STATS, HAL_TLV_HDR_TAG) |
-                 u32_encode_bits(sizeof(*desc), HAL_TLV_HDR_LEN);
+       tlv->tl = le64_encode_bits(HAL_REO_GET_QUEUE_STATS, HAL_TLV_HDR_TAG) |
+                 le64_encode_bits(sizeof(*desc), HAL_TLV_HDR_LEN);
 
        desc = (struct hal_reo_get_queue_stats *)tlv->value;
        memset_startat(desc, 0, queue_addr_lo);
@@ -59,8 +59,8 @@ static int ath12k_hal_reo_cmd_flush_cache(struct ath12k_hal *hal,
                hal->current_blk_index = avail_slot;
        }
 
-       tlv->tl = u32_encode_bits(HAL_REO_FLUSH_CACHE, HAL_TLV_HDR_TAG) |
-                 u32_encode_bits(sizeof(*desc), HAL_TLV_HDR_LEN);
+       tlv->tl = le64_encode_bits(HAL_REO_FLUSH_CACHE, HAL_TLV_HDR_TAG) |
+                 le64_encode_bits(sizeof(*desc), HAL_TLV_HDR_LEN);
 
        desc = (struct hal_reo_flush_cache *)tlv->value;
        memset_startat(desc, 0, cache_addr_lo);
@@ -97,8 +97,8 @@ static int ath12k_hal_reo_cmd_update_rx_queue(struct hal_tlv_64_hdr *tlv,
 {
        struct hal_reo_update_rx_queue *desc;
 
-       tlv->tl = u32_encode_bits(HAL_REO_UPDATE_RX_REO_QUEUE, HAL_TLV_HDR_TAG) |
-                 u32_encode_bits(sizeof(*desc), HAL_TLV_HDR_LEN);
+       tlv->tl = le64_encode_bits(HAL_REO_UPDATE_RX_REO_QUEUE, HAL_TLV_HDR_TAG) |
+                 le64_encode_bits(sizeof(*desc), HAL_TLV_HDR_LEN);
 
        desc = (struct hal_reo_update_rx_queue *)tlv->value;
        memset_startat(desc, 0, queue_addr_lo);