]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
platform/x86: intel/pmc: Fix ioremap() of bad address
authorDavid E. Box <david.e.box@linux.intel.com>
Mon, 6 Jan 2025 17:46:52 +0000 (09:46 -0800)
committerIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Tue, 7 Jan 2025 15:30:11 +0000 (17:30 +0200)
In pmc_core_ssram_get_pmc(), the physical addresses for hidden SSRAM
devices are retrieved from the MMIO region of the primary SSRAM device.
If additional devices are not present, the address returned is zero.
Currently, the code does not check for this condition, resulting in
ioremap() incorrectly attempting to map address 0.

Add a check for a zero address and return 0 if no additional devices
are found, as it is not an error for the device to be absent.

Fixes: a01486dc4bb1 ("platform/x86/intel/pmc: Cleanup SSRAM discovery")
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Link: https://lore.kernel.org/r/20250106174653.1497128-1-david.e.box@linux.intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
drivers/platform/x86/intel/pmc/core_ssram.c

index 8504154b649f47de9ec94fefb1a48e2b58548472..927f58dc73e32446e41273cd8e6c62abbe8cf4c1 100644 (file)
@@ -269,8 +269,12 @@ pmc_core_ssram_get_pmc(struct pmc_dev *pmcdev, int pmc_idx, u32 offset)
                /*
                 * The secondary PMC BARS (which are behind hidden PCI devices)
                 * are read from fixed offsets in MMIO of the primary PMC BAR.
+                * If a device is not present, the value will be 0.
                 */
                ssram_base = get_base(tmp_ssram, offset);
+               if (!ssram_base)
+                       return 0;
+
                ssram = ioremap(ssram_base, SSRAM_HDR_SIZE);
                if (!ssram)
                        return -ENOMEM;