4.9-stable patches

added patches:
	kvm-ppc-book3s-hv-save-restore-host-values-of-debug-registers.patch

diff --git a/queue-4.9/kvm-ppc-book3s-hv-save-restore-host-values-of-debug-registers.patch b/queue-4.9/kvm-ppc-book3s-hv-save-restore-host-values-of-debug-registers.patch
new file mode 100644 (file)
index 0000000..0d2f49c
--- /dev/null
+++ b/queue-4.9/kvm-ppc-book3s-hv-save-restore-host-values-of-debug-registers.patch
@@ -0,0 +1,122 @@
+From 7ceaa6dcd8c6f59588428cec37f3c8093dd1011f Mon Sep 17 00:00:00 2001
+From: Paul Mackerras <paulus@ozlabs.org>
+Date: Fri, 16 Jun 2017 11:53:19 +1000
+Subject: KVM: PPC: Book3S HV: Save/restore host values of debug registers
+
+From: Paul Mackerras <paulus@ozlabs.org>
+
+commit 7ceaa6dcd8c6f59588428cec37f3c8093dd1011f upstream.
+
+At present, HV KVM on POWER8 and POWER9 machines loses any instruction
+or data breakpoint set in the host whenever a guest is run.
+Instruction breakpoints are currently only used by xmon, but ptrace
+and the perf_event subsystem can set data breakpoints as well as xmon.
+
+To fix this, we save the host values of the debug registers (CIABR,
+DAWR and DAWRX) before entering the guest and restore them on exit.
+To provide space to save them in the stack frame, we expand the stack
+frame allocated by kvmppc_hv_entry() from 112 to 144 bytes.
+
+[paulus@ozlabs.org - Adjusted stack offsets since we aren't saving
+ POWER9-specific registers.]
+
+Fixes: b005255e12a3 ("KVM: PPC: Book3S HV: Context-switch new POWER8 SPRs", 2014-01-08)
+Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/kvm/book3s_hv_rmhandlers.S |   39 ++++++++++++++++++++++++++------
+ 1 file changed, 32 insertions(+), 7 deletions(-)
+
+--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
++++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+@@ -37,6 +37,13 @@
+ #define NAPPING_CEDE  1
+ #define NAPPING_NOVCPU        2
+ 
++/* Stack frame offsets for kvmppc_hv_entry */
++#define SFS                   112
++#define STACK_SLOT_TRAP               (SFS-4)
++#define STACK_SLOT_CIABR      (SFS-16)
++#define STACK_SLOT_DAWR               (SFS-24)
++#define STACK_SLOT_DAWRX      (SFS-32)
++
+ /*
+  * Call kvmppc_hv_entry in real mode.
+  * Must be called with interrupts hard-disabled.
+@@ -289,10 +296,10 @@ kvm_novcpu_exit:
+       bl      kvmhv_accumulate_time
+ #endif
+ 13:   mr      r3, r12
+-      stw     r12, 112-4(r1)
++      stw     r12, STACK_SLOT_TRAP(r1)
+       bl      kvmhv_commence_exit
+       nop
+-      lwz     r12, 112-4(r1)
++      lwz     r12, STACK_SLOT_TRAP(r1)
+       b       kvmhv_switch_to_host
+ 
+ /*
+@@ -537,7 +544,7 @@ kvmppc_hv_entry:
+        */
+       mflr    r0
+       std     r0, PPC_LR_STKOFF(r1)
+-      stdu    r1, -112(r1)
++      stdu    r1, -SFS(r1)
+ 
+       /* Save R1 in the PACA */
+       std     r1, HSTATE_HOST_R1(r13)
+@@ -698,6 +705,16 @@ kvmppc_got_guest:
+       mtspr   SPRN_PURR,r7
+       mtspr   SPRN_SPURR,r8
+ 
++      /* Save host values of some registers */
++BEGIN_FTR_SECTION
++      mfspr   r5, SPRN_CIABR
++      mfspr   r6, SPRN_DAWR
++      mfspr   r7, SPRN_DAWRX
++      std     r5, STACK_SLOT_CIABR(r1)
++      std     r6, STACK_SLOT_DAWR(r1)
++      std     r7, STACK_SLOT_DAWRX(r1)
++END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
++
+ BEGIN_FTR_SECTION
+       /* Set partition DABR */
+       /* Do this before re-enabling PMU to avoid P7 DABR corruption bug */
+@@ -1361,8 +1378,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
+        */
+       li      r0, 0
+       mtspr   SPRN_IAMR, r0
+-      mtspr   SPRN_CIABR, r0
+-      mtspr   SPRN_DAWRX, r0
+       mtspr   SPRN_PSPB, r0
+       mtspr   SPRN_TCSCR, r0
+       mtspr   SPRN_WORT, r0
+@@ -1521,6 +1536,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
+       slbia
+       ptesync
+ 
++      /* Restore host values of some registers */
++BEGIN_FTR_SECTION
++      ld      r5, STACK_SLOT_CIABR(r1)
++      ld      r6, STACK_SLOT_DAWR(r1)
++      ld      r7, STACK_SLOT_DAWRX(r1)
++      mtspr   SPRN_CIABR, r5
++      mtspr   SPRN_DAWR, r6
++      mtspr   SPRN_DAWRX, r7
++END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
++
+       /*
+        * POWER7/POWER8 guest -> host partition switch code.
+        * We don't have to lock against tlbies but we do
+@@ -1654,8 +1679,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
+       li      r0, KVM_GUEST_MODE_NONE
+       stb     r0, HSTATE_IN_GUEST(r13)
+ 
+-      ld      r0, 112+PPC_LR_STKOFF(r1)
+-      addi    r1, r1, 112
++      ld      r0, SFS+PPC_LR_STKOFF(r1)
++      addi    r1, r1, SFS
+       mtlr    r0
+       blr
+ 

diff --git a/queue-4.9/series b/queue-4.9/series
index d9e31ed1eab7b4eb2d9aec48fafe749f5e62f13c..6d462f1b10e21f0410bc6e90407c00532905fc71 100644 (file)
--- a/queue-4.9/series
+++ b/queue-4.9/series
@@ -17,3 +17,4 @@ drm-vmwgfx-fix-gcc-7.1.1-warning.patch
 drm-nouveau-disp-nv50-bump-max-chans-to-21.patch
 drm-nouveau-bar-gf100-fix-access-to-upper-half-of-bar2.patch
 kvm-ppc-book3s-hv-restore-critical-sprs-to-host-values-on-guest-exit.patch
+kvm-ppc-book3s-hv-save-restore-host-values-of-debug-registers.patch