RDMA/bnxt_re: introduce wqe mode to select execution path

The bnxt_re driver need to decide on how much SQ and RQ memory should to
be allocated and which wqe posting/polling algorithm to use.

Making changes to set the wqe-mode to a default value during device
registration sequence. The wqe-mode is passed to the lower layer driver as
well. Going forward in the lower layer driver wqe-mode will be used to
decide execution path. Initializing the wqe-mode to static wqe type for
now.

Link: https://lore.kernel.org/r/1594822619-4098-2-git-send-email-devesh.sharma@broadcom.com
Signed-off-by: Devesh Sharma <devesh.sharma@broadcom.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

diff --git a/drivers/infiniband/hw/bnxt_re/ib_verbs.c b/drivers/infiniband/hw/bnxt_re/ib_verbs.c
index f32c7e85ae05d3234d026f431d67bc8435d3858a..e97bee3ff5de31704de60f9837dfa5f3af8f2279 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/ib_verbs.c
+++ b/drivers/infiniband/hw/bnxt_re/ib_verbs.c
@@ -1183,6 +1183,7 @@ static int bnxt_re_init_qp_attr(struct bnxt_re_qp *qp, struct bnxt_re_pd *pd,
                goto out;
        }
        qplqp->type = (u8)qptype;
+       qplqp->wqe_mode = rdev->chip_ctx->modes.wqe_mode;
 
        if (init_attr->qp_type == IB_QPT_RC) {
                qplqp->max_rd_atomic = dev_attr->max_qp_rd_atom;

diff --git a/drivers/infiniband/hw/bnxt_re/main.c b/drivers/infiniband/hw/bnxt_re/main.c
index b12fbc857f94253166aabb6aeeddc18d1184cb95..dad0df8a2467993aca1dac4d782bf2045292e62e 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/main.c
+++ b/drivers/infiniband/hw/bnxt_re/main.c
@@ -82,6 +82,15 @@ static void bnxt_re_remove_device(struct bnxt_re_dev *rdev);
 static void bnxt_re_dealloc_driver(struct ib_device *ib_dev);
 static void bnxt_re_stop_irq(void *handle);
 
+static void bnxt_re_set_drv_mode(struct bnxt_re_dev *rdev, u8 mode)
+{
+       struct bnxt_qplib_chip_ctx *cctx;
+
+       cctx = rdev->chip_ctx;
+       cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
+                              mode : BNXT_QPLIB_WQE_MODE_STATIC;
+}
+
 static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
 {
        struct bnxt_qplib_chip_ctx *chip_ctx;
@@ -97,7 +106,7 @@ static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
        kfree(chip_ctx);
 }
 
-static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev)
+static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev, u8 wqe_mode)
 {
        struct bnxt_qplib_chip_ctx *chip_ctx;
        struct bnxt_en_dev *en_dev;
@@ -117,6 +126,7 @@ static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev)
        rdev->qplib_res.cctx = rdev->chip_ctx;
        rdev->rcfw.res = &rdev->qplib_res;
 
+       bnxt_re_set_drv_mode(rdev, wqe_mode);
        return 0;
 }
 
@@ -1386,7 +1396,7 @@ static void bnxt_re_worker(struct work_struct *work)
        schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
 }
 
-static int bnxt_re_dev_init(struct bnxt_re_dev *rdev)
+static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 wqe_mode)
 {
        struct bnxt_qplib_creq_ctx *creq;
        struct bnxt_re_ring_attr rattr;
@@ -1406,7 +1416,7 @@ static int bnxt_re_dev_init(struct bnxt_re_dev *rdev)
        }
        set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
 
-       rc = bnxt_re_setup_chip_ctx(rdev);
+       rc = bnxt_re_setup_chip_ctx(rdev, wqe_mode);
        if (rc) {
                ibdev_err(&rdev->ibdev, "Failed to get chip context\n");
                return -EINVAL;
@@ -1585,7 +1595,7 @@ static void bnxt_re_remove_device(struct bnxt_re_dev *rdev)
 }
 
 static int bnxt_re_add_device(struct bnxt_re_dev **rdev,
-                             struct net_device *netdev)
+                             struct net_device *netdev, u8 wqe_mode)
 {
        int rc;
 
@@ -1599,7 +1609,7 @@ static int bnxt_re_add_device(struct bnxt_re_dev **rdev,
        }
 
        pci_dev_get((*rdev)->en_dev->pdev);
-       rc = bnxt_re_dev_init(*rdev);
+       rc = bnxt_re_dev_init(*rdev, wqe_mode);
        if (rc) {
                pci_dev_put((*rdev)->en_dev->pdev);
                bnxt_re_dev_unreg(*rdev);
@@ -1711,7 +1721,8 @@ static int bnxt_re_netdev_event(struct notifier_block *notifier,
        case NETDEV_REGISTER:
                if (rdev)
                        break;
-               rc = bnxt_re_add_device(&rdev, real_dev);
+               rc = bnxt_re_add_device(&rdev, real_dev,
+                                       BNXT_QPLIB_WQE_MODE_STATIC);
                if (!rc)
                        sch_work = true;
                release = false;

diff --git a/drivers/infiniband/hw/bnxt_re/qplib_fp.h b/drivers/infiniband/hw/bnxt_re/qplib_fp.h
index 568ca390322c7bf29559557604e6384b6b68c776..6146f7dc368ca71da8c524d711dce70798b4a461 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/qplib_fp.h
+++ b/drivers/infiniband/hw/bnxt_re/qplib_fp.h
@@ -224,9 +224,10 @@ struct bnxt_qplib_qp {
        u32                             id;
        u8                              type;
        u8                              sig_type;
-       u32                             modify_flags;
+       u8                              wqe_mode;
        u8                              state;
        u8                              cur_qp_state;
+       u64                             modify_flags;
        u32                             max_inline_data;
        u32                             mtu;
        u8                              path_mtu;

diff --git a/drivers/infiniband/hw/bnxt_re/qplib_res.h b/drivers/infiniband/hw/bnxt_re/qplib_res.h
index c29cbd3a2d7b0addcf3db9895115a8cafbe67ef0..03a0f29e7432373956a3f424e6908a22dc4b3843 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/qplib_res.h
+++ b/drivers/infiniband/hw/bnxt_re/qplib_res.h
@@ -41,6 +41,28 @@
 
 extern const struct bnxt_qplib_gid bnxt_qplib_gid_zero;
 
+#define CHIP_NUM_57508         0x1750
+#define CHIP_NUM_57504         0x1751
+#define CHIP_NUM_57502         0x1752
+
+enum bnxt_qplib_wqe_mode {
+       BNXT_QPLIB_WQE_MODE_STATIC      = 0x00,
+       BNXT_QPLIB_WQE_MODE_VARIABLE    = 0x01,
+       BNXT_QPLIB_WQE_MODE_INVALID     = 0x02
+};
+
+struct bnxt_qplib_drv_modes {
+       u8      wqe_mode;
+       /* Other modes to follow here */
+};
+
+struct bnxt_qplib_chip_ctx {
+       u16     chip_num;
+       u8      chip_rev;
+       u8      chip_metal;
+       struct bnxt_qplib_drv_modes modes;
+};
+
 #define PTR_CNT_PER_PG         (PAGE_SIZE / sizeof(void *))
 #define PTR_MAX_IDX_PER_PG     (PTR_CNT_PER_PG - 1)
 #define PTR_PG(x)              (((x) & ~PTR_MAX_IDX_PER_PG) / PTR_CNT_PER_PG)
@@ -230,16 +252,6 @@ struct bnxt_qplib_ctx {
        u64                             hwrm_intf_ver;
 };
 
-struct bnxt_qplib_chip_ctx {
-       u16     chip_num;
-       u8      chip_rev;
-       u8      chip_metal;
-};
-
-#define CHIP_NUM_57508         0x1750
-#define CHIP_NUM_57504         0x1751
-#define CHIP_NUM_57502         0x1752
-
 struct bnxt_qplib_res {
        struct pci_dev                  *pdev;
        struct bnxt_qplib_chip_ctx      *cctx;