drm/amdgpu/nv: use common nbio callback to set remap offset

This fixes HDP flushes on systems with non-4K pages.

Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
index 41ae0a6f9db86dc3fdea74530adc5e5c46c2fea9..fa479dfa1ec15552d1c26a3adb3cfee2fe76d49f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
@@ -339,10 +339,6 @@ static void nbio_v2_3_init_registers(struct amdgpu_device *adev)
 
        if (def != data)
                WREG32_PCIE(smnPCIE_CONFIG_CNTL, data);
-
-       if (amdgpu_sriov_vf(adev))
-               adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0,
-                       mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2;
 }
 
 #define NAVI10_PCIE__LC_L0S_INACTIVITY_DEFAULT         0x00000000 // off by default, no gains over L1

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c
index 52774a096350e8ffb988e4d979f09fad3aab099f..a766e2d90cd00f695d1ad617b5cc4915deef6daf 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c
@@ -402,10 +402,6 @@ static void nbio_v7_2_init_registers(struct amdgpu_device *adev)
                WREG32_SOC15(NBIO, 0, regRCC_DEV2_EPF0_STRAP2, data);
                break;
        }
-
-       if (amdgpu_sriov_vf(adev))
-               adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0,
-                       regBIF_BX_PF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2;
 }
 
 #define MMIO_REG_HOLE_OFFSET (0x80000 - PAGE_SIZE)

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 12e54047bf7959725baf3a3b2871e05fd08412e6..7e30a89fe03efeeb972dc5f27e7ae7e60d70dcc6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -637,13 +637,9 @@ static const struct amdgpu_asic_funcs nv_asic_funcs = {
 
 static int nv_common_early_init(void *handle)
 {
-#define MMIO_REG_HOLE_OFFSET (0x80000 - PAGE_SIZE)
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       if (!amdgpu_sriov_vf(adev)) {
-               adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET;
-               adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET;
-       }
+       adev->nbio.funcs->set_reg_remap(adev);
        adev->smc_rreg = NULL;
        adev->smc_wreg = NULL;
        adev->pcie_rreg = &amdgpu_device_indirect_rreg;