3.18-stable patches

added patches:
	arm-8452-3-pj4-make-coprocessor-access-sequences-buildable-in-thumb2-mode.patch

diff --git a/queue-3.18/arm-8452-3-pj4-make-coprocessor-access-sequences-buildable-in-thumb2-mode.patch b/queue-3.18/arm-8452-3-pj4-make-coprocessor-access-sequences-buildable-in-thumb2-mode.patch
new file mode 100644 (file)
index 0000000..bbabf9f
--- /dev/null
+++ b/queue-3.18/arm-8452-3-pj4-make-coprocessor-access-sequences-buildable-in-thumb2-mode.patch
@@ -0,0 +1,57 @@
+From 5008efc83bf85b647aa1cbc44718b1675bbb7444 Mon Sep 17 00:00:00 2001
+From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+Date: Tue, 22 Dec 2015 08:24:59 +0100
+Subject: ARM: 8452/3: PJ4: make coprocessor access sequences buildable in Thumb2 mode
+
+From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+
+commit 5008efc83bf85b647aa1cbc44718b1675bbb7444 upstream.
+
+The PJ4 inline asm sequence to write to cp15 cannot be built in Thumb-2
+mode, due to the way it performs arithmetic on the program counter, so it
+is built in ARM mode instead. However, building C files in ARM mode under
+CONFIG_THUMB2_KERNEL is problematic, since the instrumentation performed
+by subsystems like ftrace does not expect having to deal with interworking
+branches.
+
+Since the sequence in question is simply a poor man's ISB instruction,
+let's use a straight 'isb' instead when building in Thumb2 mode. Thumb2
+implies V7, so 'isb' should always be supported in that case.
+
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Nicolas Pitre <nico@linaro.org>
+Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/kernel/Makefile  |    1 -
+ arch/arm/kernel/pj4-cp0.c |    4 ++++
+ 2 files changed, 4 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/kernel/Makefile
++++ b/arch/arm/kernel/Makefile
+@@ -84,7 +84,6 @@ obj-$(CONFIG_CPU_PJ4B)               += pj4-cp0.o
+ obj-$(CONFIG_IWMMXT)          += iwmmxt.o
+ obj-$(CONFIG_PERF_EVENTS)     += perf_regs.o
+ obj-$(CONFIG_HW_PERF_EVENTS)  += perf_event.o perf_event_cpu.o
+-CFLAGS_pj4-cp0.o              := -marm
+ AFLAGS_iwmmxt.o                       := -Wa,-mcpu=iwmmxt
+ obj-$(CONFIG_ARM_CPU_TOPOLOGY)  += topology.o
+ 
+--- a/arch/arm/kernel/pj4-cp0.c
++++ b/arch/arm/kernel/pj4-cp0.c
+@@ -66,9 +66,13 @@ static void __init pj4_cp_access_write(u
+ 
+       __asm__ __volatile__ (
+               "mcr    p15, 0, %1, c1, c0, 2\n\t"
++#ifdef CONFIG_THUMB2_KERNEL
++              "isb\n\t"
++#else
+               "mrc    p15, 0, %0, c1, c0, 2\n\t"
+               "mov    %0, %0\n\t"
+               "sub    pc, pc, #4\n\t"
++#endif
+               : "=r" (temp) : "r" (value));
+ }
+ 

diff --git a/queue-3.18/series b/queue-3.18/series
index 3f559c4d3777a28146770ebf1ce099f4fa26d844..2e88528acda6dde4590c0fe2c52a78766785bc8f 100644 (file)
--- a/queue-3.18/series
+++ b/queue-3.18/series
@@ -33,3 +33,4 @@ ipv6-reorder-ip6_route_dev_notifier-after-ipv6_dev_notf.patch
 tcp-fix-wraparound-issue-in-tcp_lp.patch
 f2fs-sanity-check-segment-count.patch
 drm-ttm-fix-use-after-free-races-in-vm-fault-handling.patch
+arm-8452-3-pj4-make-coprocessor-access-sequences-buildable-in-thumb2-mode.patch