--- a/arch/arm64/include/asm/insn.h
+++ b/arch/arm64/include/asm/insn.h
-@@ -218,7 +218,9 @@ enum aarch64_insn_ldst_type {
+@@ -219,7 +219,9 @@ enum aarch64_insn_ldst_type {
AARCH64_INSN_LDST_LOAD_PAIR_POST_INDEX,
AARCH64_INSN_LDST_STORE_PAIR_POST_INDEX,
AARCH64_INSN_LDST_LOAD_EX,
};
enum aarch64_insn_adsb_type {
-@@ -293,6 +295,36 @@ enum aarch64_insn_adr_type {
+@@ -294,6 +296,36 @@ enum aarch64_insn_adr_type {
AARCH64_INSN_ADR_TYPE_ADR,
};
#define __AARCH64_INSN_FUNCS(abbr, mask, val) \
static __always_inline bool aarch64_insn_is_##abbr(u32 code) \
{ \
-@@ -310,6 +342,11 @@ __AARCH64_INSN_FUNCS(prfm, 0x3FC00000, 0
+@@ -311,6 +343,11 @@ __AARCH64_INSN_FUNCS(prfm, 0x3FC00000, 0
__AARCH64_INSN_FUNCS(prfm_lit, 0xFF000000, 0xD8000000)
__AARCH64_INSN_FUNCS(str_reg, 0x3FE0EC00, 0x38206800)
__AARCH64_INSN_FUNCS(ldadd, 0x3F20FC00, 0x38200000)
__AARCH64_INSN_FUNCS(ldr_reg, 0x3FE0EC00, 0x38606800)
__AARCH64_INSN_FUNCS(ldr_lit, 0xBF000000, 0x18000000)
__AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000)
-@@ -452,13 +489,6 @@ u32 aarch64_insn_gen_load_store_ex(enum
+@@ -453,13 +490,6 @@ u32 aarch64_insn_gen_load_store_ex(enum
enum aarch64_insn_register state,
enum aarch64_insn_size_type size,
enum aarch64_insn_ldst_type type);
u32 aarch64_insn_gen_add_sub_imm(enum aarch64_insn_register dst,
enum aarch64_insn_register src,
int imm, enum aarch64_insn_variant variant,
-@@ -519,6 +549,42 @@ u32 aarch64_insn_gen_prefetch(enum aarch
+@@ -520,6 +550,42 @@ u32 aarch64_insn_gen_prefetch(enum aarch
enum aarch64_insn_prfm_type type,
enum aarch64_insn_prfm_target target,
enum aarch64_insn_prfm_policy policy);