]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
arm/98435: Missed optimization in expanding vector constructor.
authorprathamesh.kulkarni <prathamesh.kulkarni@linaro.org>
Mon, 12 Jul 2021 07:53:06 +0000 (13:23 +0530)
committerprathamesh.kulkarni <prathamesh.kulkarni@linaro.org>
Mon, 12 Jul 2021 07:53:41 +0000 (13:23 +0530)
The patch moves vec_init pattern from neon.md to vec-common.md,
and adjusts the mode to VDQX to accomodate binary floats. Also,
the pattern is additionally gated on VALID_MVE_MODE.

gcc/ChangeLog:
PR target/98435
* config/arm/neon.md (vec_init): Move to ...
* config/arm/vec-common.md (vec_init): ... here.
Change the pattern's mode to VDQX and gate it on VALID_MVE_MODE.

gcc/testsuite/ChangeLog:
PR target/98435
* gcc.target/arm/simd/pr98435.c: New test.

gcc/config/arm/neon.md
gcc/config/arm/vec-common.md
gcc/testsuite/gcc.target/arm/simd/pr98435.c [new file with mode: 0644]

index 81cc8d36d555b1dffb861dfc653950d6b18ec732..64365e0a909faf3cc726e01bf33db26f82c869d8 100644 (file)
   [(set_attr "type" "neon_store1_one_lane_q,neon_to_gp_q")]
 )
 
-(define_expand "vec_init<mode><V_elem_l>"
-  [(match_operand:VDQ 0 "s_register_operand")
-   (match_operand 1 "" "")]
-  "TARGET_NEON || TARGET_HAVE_MVE"
-{
-  neon_expand_vector_init (operands[0], operands[1]);
-  DONE;
-})
-
 ;; Doubleword and quadword arithmetic.
 
 ;; NOTE: some other instructions also support 64-bit integer
index f90afa4cdb916a8cb5995a64f5b508867b0d20d8..68de4f0f943a066ee4e9b2f4f0f5be55346e794a 100644 (file)
    DONE;
  }
 )
+
+(define_expand "vec_init<mode><V_elem_l>"
+  [(match_operand:VDQX 0 "s_register_operand")
+   (match_operand 1 "" "")]
+  "TARGET_NEON || (TARGET_HAVE_MVE && VALID_MVE_MODE (<MODE>mode))"
+{
+  neon_expand_vector_init (operands[0], operands[1]);
+  DONE;
+})
diff --git a/gcc/testsuite/gcc.target/arm/simd/pr98435.c b/gcc/testsuite/gcc.target/arm/simd/pr98435.c
new file mode 100644 (file)
index 0000000..0af8633
--- /dev/null
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math" } */
+/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-mfloat-abi=softfp -march=armv8.2-a+bf16+fp16" } */
+
+#include <arm_neon.h>
+
+bfloat16x4_t f (bfloat16_t a)
+{
+  return (bfloat16x4_t) {a, a, a, a};
+}
+
+/* { dg-final { scan-assembler {\tvdup.16\td[0-9]+, r0} } } */
+/* { dg-final { scan-assembler {\tvmov\tr0, r1, d[0-9]+} } } */