[(set_attr "type" "neon_store1_one_lane_q,neon_to_gp_q")]
)
-(define_expand "vec_init<mode><V_elem_l>"
- [(match_operand:VDQ 0 "s_register_operand")
- (match_operand 1 "" "")]
- "TARGET_NEON || TARGET_HAVE_MVE"
-{
- neon_expand_vector_init (operands[0], operands[1]);
- DONE;
-})
-
;; Doubleword and quadword arithmetic.
;; NOTE: some other instructions also support 64-bit integer
DONE;
}
)
+
+(define_expand "vec_init<mode><V_elem_l>"
+ [(match_operand:VDQX 0 "s_register_operand")
+ (match_operand 1 "" "")]
+ "TARGET_NEON || (TARGET_HAVE_MVE && VALID_MVE_MODE (<MODE>mode))"
+{
+ neon_expand_vector_init (operands[0], operands[1]);
+ DONE;
+})
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math" } */
+/* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-mfloat-abi=softfp -march=armv8.2-a+bf16+fp16" } */
+
+#include <arm_neon.h>
+
+bfloat16x4_t f (bfloat16_t a)
+{
+ return (bfloat16x4_t) {a, a, a, a};
+}
+
+/* { dg-final { scan-assembler {\tvdup.16\td[0-9]+, r0} } } */
+/* { dg-final { scan-assembler {\tvmov\tr0, r1, d[0-9]+} } } */