cortex-a9.md (cortex-a9-neon.md): Actually include.

2011-01-18  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

        * config/arm/cortex-a9.md (cortex-a9-neon.md): Actually
        include.
        (cortex_a9_dp): Handle neon types correctly.

From-SVN: r168950

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0ed4f0186326624b21f5fa145df41eb96b73e97f..25625c4955c0c85fbab85e08c41fad0d7f22f126 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2011-01-18  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+        * config/arm/cortex-a9.md (cortex-a9-neon.md): Actually
+        include.
+        (cortex_a9_dp): Handle neon types correctly.
+
 2011-01-18  Jakub Jelinek  <jakub@redhat.com>
 
        PR rtl-optimization/47299

diff --git a/gcc/config/arm/cortex-a9.md b/gcc/config/arm/cortex-a9.md
index 8c336675b21aa9a4f15a6d73b2720275b30c0040..b74ace8332a30ecd3555dcbb076a99d249f90e91 100644 (file)
--- a/gcc/config/arm/cortex-a9.md
+++ b/gcc/config/arm/cortex-a9.md
@@ -79,10 +79,11 @@ cortex_a9_p1_e2 + cortex_a9_p0_e1 + cortex_a9_p1_e1")
 ;; which can go down E2 without any problem.
 (define_insn_reservation "cortex_a9_dp" 2
   (and (eq_attr "tune" "cortexa9")
-       (ior (eq_attr "type" "alu")
-           (ior (and (eq_attr "type" "alu_shift_reg, alu_shift")
-                (eq_attr "insn" "mov"))
-                (eq_attr "neon_type" "none"))))
+         (ior (and (eq_attr "type" "alu")
+                        (eq_attr "neon_type" "none"))
+             (and (and (eq_attr "type" "alu_shift_reg, alu_shift")
+                       (eq_attr "insn" "mov"))
+                 (eq_attr "neon_type" "none"))))
   "cortex_a9_p0_default|cortex_a9_p1_default")
 
 ;; An instruction using the shifter will go down E1.
@@ -263,3 +264,6 @@ cortex_a9_store3_4, cortex_a9_store1_2,  cortex_a9_load3_4")
   (and (eq_attr "tune" "cortexa9")
        (eq_attr "type" "fdivd"))
   "ca9fp_ds1 + ca9_issue_vfp_neon, nothing*24")
+
+;; Include Neon pipeline description
+(include "cortex-a9-neon.md")