+++ /dev/null
-From 3a96e70b8e700e704043a1d35f2fd18ad82177d8 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Sun, 15 Dec 2024 17:47:52 -0500
-Subject: pwm: stm32: Add check for clk_enable()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Mingwei Zheng <zmw12306@gmail.com>
-
-[ Upstream commit e8c59791ebb60790c74b2c3ab520f04a8a57219a ]
-
-Add check for the return value of clk_enable() to catch the potential
-error.
-
-Fixes: 19f1016ea960 ("pwm: stm32: Fix enable count for clk in .probe()")
-Signed-off-by: Mingwei Zheng <zmw12306@gmail.com>
-Signed-off-by: Jiasheng Jiang <jiashengjiangcool@gmail.com>
-Link: https://lore.kernel.org/r/20241215224752.220318-1-zmw12306@gmail.com
-Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/pwm/pwm-stm32.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c
-index 2070d107c6328..fda7d76f08b1b 100644
---- a/drivers/pwm/pwm-stm32.c
-+++ b/drivers/pwm/pwm-stm32.c
-@@ -631,8 +631,11 @@ static int stm32_pwm_probe(struct platform_device *pdev)
- priv->chip.npwm = stm32_pwm_detect_channels(priv, &num_enabled);
-
- /* Initialize clock refcount to number of enabled PWM channels. */
-- for (i = 0; i < num_enabled; i++)
-- clk_enable(priv->clk);
-+ for (i = 0; i < num_enabled; i++) {
-+ ret = clk_enable(priv->clk);
-+ if (ret)
-+ return ret;
-+ }
-
- ret = pwmchip_add(&priv->chip);
- if (ret < 0)
---
-2.39.5
-
+++ /dev/null
-From 8043273e4e4a30f3924ccbfcacbb1eeccb110d9b Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Fri, 6 Dec 2024 16:53:18 -0500
-Subject: pwm: stm32-lp: Add check for clk_enable()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Mingwei Zheng <zmw12306@gmail.com>
-
-[ Upstream commit cce16e7f6216227964cda25f5f23634bce2c500f ]
-
-Add check for the return value of clk_enable() to catch the potential
-error.
-We used APP-Miner to find it.
-
-Fixes: e70a540b4e02 ("pwm: Add STM32 LPTimer PWM driver")
-Signed-off-by: Mingwei Zheng <zmw12306@gmail.com>
-Signed-off-by: Jiasheng Jiang <jiashengjiangcool@gmail.com>
-Link: https://lore.kernel.org/r/20241206215318.3402860-1-zmw12306@gmail.com
-Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/pwm/pwm-stm32-lp.c | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
-index 61a1c87cd5016..c0350f5e02ac5 100644
---- a/drivers/pwm/pwm-stm32-lp.c
-+++ b/drivers/pwm/pwm-stm32-lp.c
-@@ -169,8 +169,12 @@ static void stm32_pwm_lp_get_state(struct pwm_chip *chip,
- regmap_read(priv->regmap, STM32_LPTIM_CR, &val);
- state->enabled = !!FIELD_GET(STM32_LPTIM_ENABLE, val);
- /* Keep PWM counter clock refcount in sync with PWM initial state */
-- if (state->enabled)
-- clk_enable(priv->clk);
-+ if (state->enabled) {
-+ int ret = clk_enable(priv->clk);
-+
-+ if (ret)
-+ return ret;
-+ }
-
- regmap_read(priv->regmap, STM32_LPTIM_CFGR, &val);
- presc = FIELD_GET(STM32_LPTIM_PRESC, val);
---
-2.39.5
-
cpupower-fix-tsc-mhz-calculation.patch
dt-bindings-mfd-bd71815-fix-rsense-and-typos.patch
leds-netxbig-fix-an-of-node-reference-leak-in-netxbi.patch
-pwm-stm32-lp-add-check-for-clk_enable.patch
cpufreq-schedutil-fix-superfluous-updates-caused-by-.patch
udp-deal-with-race-between-udp-socket-address-change.patch
clk-imx8mp-fix-clkout1-2-support.patch
wifi-cfg80211-handle-specific-bssid-in-6ghz-scanning.patch
wifi-cfg80211-adjust-allocation-of-colocated-ap-data.patch
clk-analogbits-fix-incorrect-calculation-of-vco-rate.patch
-pwm-stm32-add-check-for-clk_enable.patch
selftests-landlock-fix-error-message.patch
net-let-net.core.dev_weight-always-be-non-zero.patch
net-mlxfw-drop-hard-coded-max-fw-flash-image-size.patch