]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
media: iris: Split power on per variants
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 4 Aug 2025 13:37:39 +0000 (15:37 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Tue, 9 Sep 2025 13:59:20 +0000 (15:59 +0200)
Current devices use same power up sequence, but starting with Qualcomm
SM8750 (VPU v3.5) the sequence will grow quite a bit, so allow
customizing it.  No functional change so far for existing devices.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
drivers/media/platform/qcom/iris/iris_vpu2.c
drivers/media/platform/qcom/iris/iris_vpu3x.c
drivers/media/platform/qcom/iris/iris_vpu_common.c
drivers/media/platform/qcom/iris/iris_vpu_common.h

index 7cf1bfc352d34b897451061b5c14fbe90276433d..de7d142316d2dc9ab0c4ad9cc8161c87ac949b4c 100644 (file)
@@ -34,6 +34,8 @@ static u64 iris_vpu2_calc_freq(struct iris_inst *inst, size_t data_size)
 
 const struct vpu_ops iris_vpu2_ops = {
        .power_off_hw = iris_vpu_power_off_hw,
+       .power_on_hw = iris_vpu_power_on_hw,
        .power_off_controller = iris_vpu_power_off_controller,
+       .power_on_controller = iris_vpu_power_on_controller,
        .calc_freq = iris_vpu2_calc_freq,
 };
index bfc52eb04ed0e1c88efe74a8d27bb95e8a0ca331..27b8589afe6d1196d7486b1307787e4adca8c2aa 100644 (file)
@@ -292,12 +292,16 @@ static u64 iris_vpu3x_calculate_frequency(struct iris_inst *inst, size_t data_si
 
 const struct vpu_ops iris_vpu3_ops = {
        .power_off_hw = iris_vpu3_power_off_hardware,
+       .power_on_hw = iris_vpu_power_on_hw,
        .power_off_controller = iris_vpu_power_off_controller,
+       .power_on_controller = iris_vpu_power_on_controller,
        .calc_freq = iris_vpu3x_calculate_frequency,
 };
 
 const struct vpu_ops iris_vpu33_ops = {
        .power_off_hw = iris_vpu33_power_off_hardware,
+       .power_on_hw = iris_vpu_power_on_hw,
        .power_off_controller = iris_vpu33_power_off_controller,
+       .power_on_controller = iris_vpu_power_on_controller,
        .calc_freq = iris_vpu3x_calculate_frequency,
 };
index 42a7c53ce48eb56a4210c7e25c707a1b0881a8ce..6c51002f72ab3d9e16d5a2a50ac712fac91ae25c 100644 (file)
@@ -271,7 +271,7 @@ void iris_vpu_power_off(struct iris_core *core)
                disable_irq_nosync(core->irq);
 }
 
-static int iris_vpu_power_on_controller(struct iris_core *core)
+int iris_vpu_power_on_controller(struct iris_core *core)
 {
        u32 rst_tbl_size = core->iris_platform_data->clk_rst_tbl_size;
        int ret;
@@ -302,7 +302,7 @@ err_disable_power:
        return ret;
 }
 
-static int iris_vpu_power_on_hw(struct iris_core *core)
+int iris_vpu_power_on_hw(struct iris_core *core)
 {
        int ret;
 
@@ -337,11 +337,11 @@ int iris_vpu_power_on(struct iris_core *core)
        if (ret)
                goto err;
 
-       ret = iris_vpu_power_on_controller(core);
+       ret = core->iris_platform_data->vpu_ops->power_on_controller(core);
        if (ret)
                goto err_unvote_icc;
 
-       ret = iris_vpu_power_on_hw(core);
+       ret = core->iris_platform_data->vpu_ops->power_on_hw(core);
        if (ret)
                goto err_power_off_ctrl;
 
index 93b7fa27be3bfa1cf6a3e83cc192cdb89d63575f..d95b305ca5a89ba8f08aefb6e6acd9ea4a721a8b 100644 (file)
@@ -14,7 +14,9 @@ extern const struct vpu_ops iris_vpu33_ops;
 
 struct vpu_ops {
        void (*power_off_hw)(struct iris_core *core);
+       int (*power_on_hw)(struct iris_core *core);
        int (*power_off_controller)(struct iris_core *core);
+       int (*power_on_controller)(struct iris_core *core);
        u64 (*calc_freq)(struct iris_inst *inst, size_t data_size);
 };
 
@@ -23,6 +25,8 @@ void iris_vpu_raise_interrupt(struct iris_core *core);
 void iris_vpu_clear_interrupt(struct iris_core *core);
 int iris_vpu_watchdog(struct iris_core *core, u32 intr_status);
 int iris_vpu_prepare_pc(struct iris_core *core);
+int iris_vpu_power_on_controller(struct iris_core *core);
+int iris_vpu_power_on_hw(struct iris_core *core);
 int iris_vpu_power_on(struct iris_core *core);
 int iris_vpu_power_off_controller(struct iris_core *core);
 void iris_vpu_power_off_hw(struct iris_core *core);