drm/amdgpu: split ras_eeprom_init into init and check functions

Init function is for ras table header read and check function is
responsible for the validation of the header. Call them in different
stages.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 66e80fcc28999f39043fbfdfcbce3b6fdb9d928a..738a645867efe9cc9e7db7420cf622710eb19877 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -3015,9 +3015,20 @@ static int amdgpu_ras_load_bad_pages(struct amdgpu_device *adev)
                                control->rec_type = AMDGPU_RAS_EEPROM_REC_MCA;
                }
 
+               ret = amdgpu_ras_eeprom_check(control);
+               if (ret)
+                       goto out;
+
+               /* HW not usable */
+               if (amdgpu_ras_is_rma(adev)) {
+                       ret = -EHWPOISON;
+                       goto out;
+               }
+
                ret = amdgpu_ras_add_bad_pages(adev, bps, control->ras_num_recs, true);
        }
 
+out:
        kfree(bps);
        return ret;
 }
@@ -3408,10 +3419,6 @@ int amdgpu_ras_init_badpage_info(struct amdgpu_device *adev)
        if (ret)
                return ret;
 
-       /* HW not usable */
-       if (amdgpu_ras_is_rma(adev))
-               return -EHWPOISON;
-
        if (!adev->umc.ras || !adev->umc.ras->convert_ras_err_addr)
                control->rec_type = AMDGPU_RAS_EEPROM_REC_PA;
 

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index bd8acb55f76f2b6eb0adaf3962bd9d0d6d13aae2..0db6d1bd20022f3b244994994bf4be933438e687 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -1382,6 +1382,26 @@ int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control)
        }
        control->ras_fri = RAS_OFFSET_TO_INDEX(control, hdr->first_rec_offset);
 
+       return res < 0 ? res : 0;
+}
+
+int amdgpu_ras_eeprom_check(struct amdgpu_ras_eeprom_control *control)
+{
+       struct amdgpu_device *adev = to_amdgpu_device(control);
+       struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;
+       struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
+       int res;
+
+       if (!__is_ras_eeprom_supported(adev))
+               return 0;
+
+       /* Verify i2c adapter is initialized */
+       if (!adev->pm.ras_eeprom_i2c_bus || !adev->pm.ras_eeprom_i2c_bus->algo)
+               return -ENOENT;
+
+       if (!__get_eeprom_i2c_addr(adev, control))
+               return -EINVAL;
+
        if (hdr->header == RAS_TABLE_HDR_VAL) {
                DRM_DEBUG_DRIVER("Found existing EEPROM table with %d records",
                                 control->ras_num_recs);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
index d3a6f7205a2f1eefa748a0cd1e0c6bbdf4c989ee..b87422df52fda58191a45e05beb960b89986df10 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
@@ -159,6 +159,8 @@ uint32_t amdgpu_ras_eeprom_max_record_count(struct amdgpu_ras_eeprom_control *co
 
 void amdgpu_ras_debugfs_set_ret_size(struct amdgpu_ras_eeprom_control *control);
 
+int amdgpu_ras_eeprom_check(struct amdgpu_ras_eeprom_control *control);
+
 extern const struct file_operations amdgpu_ras_debugfs_eeprom_size_ops;
 extern const struct file_operations amdgpu_ras_debugfs_eeprom_table_ops;