--- /dev/null
+From 1c01103cb90197900beb534911de558d7a43d0b3 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 12 Jul 2013 15:56:02 -0400
+Subject: drm/radeon: align VM PTBs (Page Table Blocks) to 32K
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 1c01103cb90197900beb534911de558d7a43d0b3 upstream.
+
+Covers requirements of all current asics.
+
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon.h | 5 +++++
+ drivers/gpu/drm/radeon/radeon_gart.c | 12 ++++++------
+ 2 files changed, 11 insertions(+), 6 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon.h
++++ b/drivers/gpu/drm/radeon/radeon.h
+@@ -695,6 +695,11 @@ struct radeon_ring {
+ /* number of entries in page table */
+ #define RADEON_VM_PTE_COUNT (1 << RADEON_VM_BLOCK_SIZE)
+
++/* PTBs (Page Table Blocks) need to be aligned to 32K */
++#define RADEON_VM_PTB_ALIGN_SIZE 32768
++#define RADEON_VM_PTB_ALIGN_MASK (RADEON_VM_PTB_ALIGN_SIZE - 1)
++#define RADEON_VM_PTB_ALIGN(a) (((a) + RADEON_VM_PTB_ALIGN_MASK) & ~RADEON_VM_PTB_ALIGN_MASK)
++
+ struct radeon_vm {
+ struct list_head list;
+ struct list_head va;
+--- a/drivers/gpu/drm/radeon/radeon_gart.c
++++ b/drivers/gpu/drm/radeon/radeon_gart.c
+@@ -466,8 +466,8 @@ int radeon_vm_manager_init(struct radeon
+ size += rdev->vm_manager.max_pfn * 8;
+ size *= 2;
+ r = radeon_sa_bo_manager_init(rdev, &rdev->vm_manager.sa_manager,
+- RADEON_GPU_PAGE_ALIGN(size),
+- RADEON_GPU_PAGE_SIZE,
++ RADEON_VM_PTB_ALIGN(size),
++ RADEON_VM_PTB_ALIGN_SIZE,
+ RADEON_GEM_DOMAIN_VRAM);
+ if (r) {
+ dev_err(rdev->dev, "failed to allocate vm bo (%dKB)\n",
+@@ -621,10 +621,10 @@ int radeon_vm_alloc_pt(struct radeon_dev
+ }
+
+ retry:
+- pd_size = RADEON_GPU_PAGE_ALIGN(radeon_vm_directory_size(rdev));
++ pd_size = RADEON_VM_PTB_ALIGN(radeon_vm_directory_size(rdev));
+ r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
+ &vm->page_directory, pd_size,
+- RADEON_GPU_PAGE_SIZE, false);
++ RADEON_VM_PTB_ALIGN_SIZE, false);
+ if (r == -ENOMEM) {
+ r = radeon_vm_evict(rdev, vm);
+ if (r)
+@@ -953,8 +953,8 @@ static int radeon_vm_update_pdes(struct
+ retry:
+ r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
+ &vm->page_tables[pt_idx],
+- RADEON_VM_PTE_COUNT * 8,
+- RADEON_GPU_PAGE_SIZE, false);
++ RADEON_VM_PTB_ALIGN(RADEON_VM_PTE_COUNT * 8),
++ RADEON_VM_PTB_ALIGN_SIZE, false);
+
+ if (r == -ENOMEM) {
+ r = radeon_vm_evict(rdev, vm);
--- /dev/null
+From 6c4f978b357bc779c703fda1f200e9179623d3e9 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 12 Jul 2013 15:46:09 -0400
+Subject: drm/radeon: allow selection of alignment in the sub-allocator
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 6c4f978b357bc779c703fda1f200e9179623d3e9 upstream.
+
+There are cases where we need more than 4k alignment. No
+functional change with this commit.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon.h | 1 +
+ drivers/gpu/drm/radeon/radeon_gart.c | 1 +
+ drivers/gpu/drm/radeon/radeon_object.h | 2 +-
+ drivers/gpu/drm/radeon/radeon_ring.c | 1 +
+ drivers/gpu/drm/radeon/radeon_sa.c | 7 ++++---
+ 5 files changed, 8 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon.h
++++ b/drivers/gpu/drm/radeon/radeon.h
+@@ -408,6 +408,7 @@ struct radeon_sa_manager {
+ uint64_t gpu_addr;
+ void *cpu_ptr;
+ uint32_t domain;
++ uint32_t align;
+ };
+
+ struct radeon_sa_bo;
+--- a/drivers/gpu/drm/radeon/radeon_gart.c
++++ b/drivers/gpu/drm/radeon/radeon_gart.c
+@@ -467,6 +467,7 @@ int radeon_vm_manager_init(struct radeon
+ size *= 2;
+ r = radeon_sa_bo_manager_init(rdev, &rdev->vm_manager.sa_manager,
+ RADEON_GPU_PAGE_ALIGN(size),
++ RADEON_GPU_PAGE_SIZE,
+ RADEON_GEM_DOMAIN_VRAM);
+ if (r) {
+ dev_err(rdev->dev, "failed to allocate vm bo (%dKB)\n",
+--- a/drivers/gpu/drm/radeon/radeon_object.h
++++ b/drivers/gpu/drm/radeon/radeon_object.h
+@@ -158,7 +158,7 @@ static inline void * radeon_sa_bo_cpu_ad
+
+ extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
+ struct radeon_sa_manager *sa_manager,
+- unsigned size, u32 domain);
++ unsigned size, u32 align, u32 domain);
+ extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
+ struct radeon_sa_manager *sa_manager);
+ extern int radeon_sa_bo_manager_start(struct radeon_device *rdev,
+--- a/drivers/gpu/drm/radeon/radeon_ring.c
++++ b/drivers/gpu/drm/radeon/radeon_ring.c
+@@ -224,6 +224,7 @@ int radeon_ib_pool_init(struct radeon_de
+ }
+ r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
+ RADEON_IB_POOL_SIZE*64*1024,
++ RADEON_GPU_PAGE_SIZE,
+ RADEON_GEM_DOMAIN_GTT);
+ if (r) {
+ return r;
+--- a/drivers/gpu/drm/radeon/radeon_sa.c
++++ b/drivers/gpu/drm/radeon/radeon_sa.c
+@@ -49,7 +49,7 @@ static void radeon_sa_bo_try_free(struct
+
+ int radeon_sa_bo_manager_init(struct radeon_device *rdev,
+ struct radeon_sa_manager *sa_manager,
+- unsigned size, u32 domain)
++ unsigned size, u32 align, u32 domain)
+ {
+ int i, r;
+
+@@ -57,13 +57,14 @@ int radeon_sa_bo_manager_init(struct rad
+ sa_manager->bo = NULL;
+ sa_manager->size = size;
+ sa_manager->domain = domain;
++ sa_manager->align = align;
+ sa_manager->hole = &sa_manager->olist;
+ INIT_LIST_HEAD(&sa_manager->olist);
+ for (i = 0; i < RADEON_NUM_RINGS; ++i) {
+ INIT_LIST_HEAD(&sa_manager->flist[i]);
+ }
+
+- r = radeon_bo_create(rdev, size, RADEON_GPU_PAGE_SIZE, true,
++ r = radeon_bo_create(rdev, size, align, true,
+ domain, NULL, &sa_manager->bo);
+ if (r) {
+ dev_err(rdev->dev, "(%d) failed to allocate bo for manager\n", r);
+@@ -317,7 +318,7 @@ int radeon_sa_bo_new(struct radeon_devic
+ unsigned tries[RADEON_NUM_RINGS];
+ int i, r;
+
+- BUG_ON(align > RADEON_GPU_PAGE_SIZE);
++ BUG_ON(align > sa_manager->align);
+ BUG_ON(size > sa_manager->size);
+
+ *sa_bo = kmalloc(sizeof(struct radeon_sa_bo), GFP_KERNEL);
--- /dev/null
+From f7929f34fa0e0bb6736a2484fdc07d77a1653081 Mon Sep 17 00:00:00 2001
+From: Ondrej Zary <linux@rainbow-software.org>
+Date: Fri, 19 Jul 2013 21:08:48 +0200
+Subject: drm/radeon: Another card with wrong primary dac adj
+
+From: Ondrej Zary <linux@rainbow-software.org>
+
+commit f7929f34fa0e0bb6736a2484fdc07d77a1653081 upstream.
+
+Hello,
+got another card with "too bright" problem:
+Sapphire Radeon VE 7000 DDR (VGA+S-Video)
+
+lspci -vnn:
+01:00.0 VGA compatible controller [0300]: Advanced Micro Devices [AMD] nee ATI RV100 QY [Radeon 7000/VE] [1002:5159] (prog-if 00 [VGA controller])
+ Subsystem: PC Partner Limited Sapphire Radeon VE 7000 DDR [174b:7c28]
+
+The patch below fixes the problem for this card.
+But I don't like the blacklist, couldn't some heuristic be used instead?
+The interesting thing is that the manufacturer is the same as the other card
+needing the same quirk. I wonder how many different types are broken this way.
+
+The "wrong" ps2_pdac_adj value that comes from BIOS on this card is 0x300.
+
+====================
+drm/radeon: Add primary dac adj quirk for Sapphire Radeon VE 7000 DDR
+
+Values from BIOS are wrong, causing too bright colors.
+Use default values instead.
+
+Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_combios.c | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_combios.c
++++ b/drivers/gpu/drm/radeon/radeon_combios.c
+@@ -971,10 +971,14 @@ struct radeon_encoder_primary_dac *radeo
+ }
+
+ /* quirks */
++ /* Radeon 7000 (RV100) */
++ if (((dev->pdev->device == 0x5159) &&
++ (dev->pdev->subsystem_vendor == 0x174B) &&
++ (dev->pdev->subsystem_device == 0x7c28)) ||
+ /* Radeon 9100 (R200) */
+- if ((dev->pdev->device == 0x514D) &&
++ ((dev->pdev->device == 0x514D) &&
+ (dev->pdev->subsystem_vendor == 0x174B) &&
+- (dev->pdev->subsystem_device == 0x7149)) {
++ (dev->pdev->subsystem_device == 0x7149))) {
+ /* vbios value is bad, use the default */
+ found = 0;
+ }
--- /dev/null
+From cef1d00cd56f600121ad121875655ad410a001b8 Mon Sep 17 00:00:00 2001
+From: Mark Kettenis <kettenis@openbsd.org>
+Date: Sun, 21 Jul 2013 16:44:09 -0400
+Subject: drm/radeon: fix combios tables on older cards
+
+From: Mark Kettenis <kettenis@openbsd.org>
+
+commit cef1d00cd56f600121ad121875655ad410a001b8 upstream.
+
+Noticed that my old Radeon 7500 hung after printing
+
+ drm: GPU not posted. posting now...
+
+when it wasn't selected as the primary card the BIOS. Some digging
+revealed that it was hanging in combios_parse_mmio_table() while
+parsing the ASIC INIT 3 table. Looking at the BIOS ROM for the card,
+it becomes obvious that there is no ASIC INIT 3 table in the BIOS.
+The code is just processing random garbage. No surprise it hangs!
+
+Why do I say that there is no ASIC INIT 3 table is the BIOS? This
+table is found through the MISC INFO table. The MISC INFO table can
+be found at offset 0x5e in the COMBIOS header. But the header is
+smaller than that. The COMBIOS header starts at offset 0x126. The
+standard PCI Data Structure (the bit that starts with 'PCIR') lives at
+offset 0x180. That means that the COMBIOS header can not be larger
+than 0x5a bytes and therefore cannot contain a MISC INFO table.
+
+I looked at a dozen or so BIOS images, some my own, some downloaded from:
+
+ <http://www.techpowerup.com/vgabios/index.php?manufacturer=ATI&page=1>
+
+It is fairly obvious that the size of the COMBIOS header can be found
+at offset 0x6 of the header. Not sure if it is a 16-bit number or
+just an 8-bit number, but that doesn't really matter since the tables
+seems to be always smaller than 256 bytes.
+
+So I think combios_get_table_offset() should check if the requested
+table is present. This can be done by checking the offset against the
+size of the header. See the diff below. The diff is against the WIP
+OpenBSD codebase that roughly corresponds to Linux 3.8.13 at this
+point. But I don't think this bit of the code changed much since
+then.
+
+For what it is worth:
+
+Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_combios.c | 145 +++++++++-----------------------
+ 1 file changed, 41 insertions(+), 104 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_combios.c
++++ b/drivers/gpu/drm/radeon/radeon_combios.c
+@@ -147,7 +147,7 @@ static uint16_t combios_get_table_offset
+ enum radeon_combios_table_offset table)
+ {
+ struct radeon_device *rdev = dev->dev_private;
+- int rev;
++ int rev, size;
+ uint16_t offset = 0, check_offset;
+
+ if (!rdev->bios)
+@@ -156,174 +156,106 @@ static uint16_t combios_get_table_offset
+ switch (table) {
+ /* absolute offset tables */
+ case COMBIOS_ASIC_INIT_1_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0xc);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0xc;
+ break;
+ case COMBIOS_BIOS_SUPPORT_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x14);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x14;
+ break;
+ case COMBIOS_DAC_PROGRAMMING_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x2a);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x2a;
+ break;
+ case COMBIOS_MAX_COLOR_DEPTH_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x2c);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x2c;
+ break;
+ case COMBIOS_CRTC_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x2e);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x2e;
+ break;
+ case COMBIOS_PLL_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x30);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x30;
+ break;
+ case COMBIOS_TV_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x32);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x32;
+ break;
+ case COMBIOS_DFP_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x34);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x34;
+ break;
+ case COMBIOS_HW_CONFIG_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x36);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x36;
+ break;
+ case COMBIOS_MULTIMEDIA_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x38);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x38;
+ break;
+ case COMBIOS_TV_STD_PATCH_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x3e);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x3e;
+ break;
+ case COMBIOS_LCD_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x40);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x40;
+ break;
+ case COMBIOS_MOBILE_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x42);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x42;
+ break;
+ case COMBIOS_PLL_INIT_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x46);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x46;
+ break;
+ case COMBIOS_MEM_CONFIG_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x48);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x48;
+ break;
+ case COMBIOS_SAVE_MASK_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x4a);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x4a;
+ break;
+ case COMBIOS_HARDCODED_EDID_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x4c);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x4c;
+ break;
+ case COMBIOS_ASIC_INIT_2_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x4e);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x4e;
+ break;
+ case COMBIOS_CONNECTOR_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x50);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x50;
+ break;
+ case COMBIOS_DYN_CLK_1_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x52);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x52;
+ break;
+ case COMBIOS_RESERVED_MEM_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x54);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x54;
+ break;
+ case COMBIOS_EXT_TMDS_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x58);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x58;
+ break;
+ case COMBIOS_MEM_CLK_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x5a);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x5a;
+ break;
+ case COMBIOS_EXT_DAC_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x5c);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x5c;
+ break;
+ case COMBIOS_MISC_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x5e);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x5e;
+ break;
+ case COMBIOS_CRT_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x60);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x60;
+ break;
+ case COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x62);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x62;
+ break;
+ case COMBIOS_COMPONENT_VIDEO_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x64);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x64;
+ break;
+ case COMBIOS_FAN_SPEED_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x66);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x66;
+ break;
+ case COMBIOS_OVERDRIVE_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x68);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x68;
+ break;
+ case COMBIOS_OEM_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x6a);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x6a;
+ break;
+ case COMBIOS_DYN_CLK_2_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x6c);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x6c;
+ break;
+ case COMBIOS_POWER_CONNECTOR_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x6e);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x6e;
+ break;
+ case COMBIOS_I2C_INFO_TABLE:
+- check_offset = RBIOS16(rdev->bios_header_start + 0x70);
+- if (check_offset)
+- offset = check_offset;
++ check_offset = 0x70;
+ break;
+ /* relative offset tables */
+ case COMBIOS_ASIC_INIT_3_TABLE: /* offset from misc info */
+@@ -439,11 +371,16 @@ static uint16_t combios_get_table_offset
+ }
+ break;
+ default:
++ check_offset = 0;
+ break;
+ }
+
+- return offset;
++ size = RBIOS8(rdev->bios_header_start + 0x6);
++ /* check absolute offset tables */
++ if (table < COMBIOS_ASIC_INIT_3_TABLE && check_offset && check_offset < size)
++ offset = RBIOS16(rdev->bios_header_start + check_offset);
+
++ return offset;
+ }
+
+ bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev)
--- /dev/null
+From 34be8c9af7b8728465963740fc11136ae90dfc36 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Thu, 18 Jul 2013 11:13:53 -0400
+Subject: drm/radeon: fix endian issues with DP handling (v3)
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 34be8c9af7b8728465963740fc11136ae90dfc36 upstream.
+
+The atom interpreter expects data in LE format, so
+swap the message buffer as apprioriate.
+
+v2: properly handle non-dw aligned byte counts.
+v3: properly handle remainder
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: Dong He <hedonghust@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_dp.c | 43 +++++++++++++++++++++++++++++++----
+ 1 file changed, 39 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/atombios_dp.c
++++ b/drivers/gpu/drm/radeon/atombios_dp.c
+@@ -44,6 +44,41 @@ static char *pre_emph_names[] = {
+ };
+
+ /***** radeon AUX functions *****/
++
++/* Atom needs data in little endian format
++ * so swap as appropriate when copying data to
++ * or from atom. Note that atom operates on
++ * dw units.
++ */
++static void radeon_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le)
++{
++#ifdef __BIG_ENDIAN
++ u8 src_tmp[20], dst_tmp[20]; /* used for byteswapping */
++ u32 *dst32, *src32;
++ int i;
++
++ memcpy(src_tmp, src, num_bytes);
++ src32 = (u32 *)src_tmp;
++ dst32 = (u32 *)dst_tmp;
++ if (to_le) {
++ for (i = 0; i < ((num_bytes + 3) / 4); i++)
++ dst32[i] = cpu_to_le32(src32[i]);
++ memcpy(dst, dst_tmp, num_bytes);
++ } else {
++ u8 dws = num_bytes & ~3;
++ for (i = 0; i < ((num_bytes + 3) / 4); i++)
++ dst32[i] = le32_to_cpu(src32[i]);
++ memcpy(dst, dst_tmp, dws);
++ if (num_bytes % 4) {
++ for (i = 0; i < (num_bytes % 4); i++)
++ dst[dws+i] = dst_tmp[dws+i];
++ }
++ }
++#else
++ memcpy(dst, src, num_bytes);
++#endif
++}
++
+ union aux_channel_transaction {
+ PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION v1;
+ PROCESS_AUX_CHANNEL_TRANSACTION_PARAMETERS_V2 v2;
+@@ -65,10 +100,10 @@ static int radeon_process_aux_ch(struct
+
+ base = (unsigned char *)(rdev->mode_info.atom_context->scratch + 1);
+
+- memcpy(base, send, send_bytes);
++ radeon_copy_swap(base, send, send_bytes, true);
+
+- args.v1.lpAuxRequest = 0 + 4;
+- args.v1.lpDataOut = 16 + 4;
++ args.v1.lpAuxRequest = cpu_to_le16((u16)(0 + 4));
++ args.v1.lpDataOut = cpu_to_le16((u16)(16 + 4));
+ args.v1.ucDataOutLen = 0;
+ args.v1.ucChannelID = chan->rec.i2c_id;
+ args.v1.ucDelay = delay / 10;
+@@ -102,7 +137,7 @@ static int radeon_process_aux_ch(struct
+ recv_bytes = recv_size;
+
+ if (recv && recv_size)
+- memcpy(recv, base + 16, recv_bytes);
++ radeon_copy_swap(recv, base + 16, recv_bytes, false);
+
+ return recv_bytes;
+ }
--- /dev/null
+From c9a6ca4abd5f1978ef15b3ece3474f4372ae5fe7 Mon Sep 17 00:00:00 2001
+From: Christian König <christian.koenig@amd.com>
+Date: Fri, 12 Jul 2013 10:05:47 +0200
+Subject: drm/radeon: fix UVD fence emit
+
+From: Christian König <christian.koenig@amd.com>
+
+commit c9a6ca4abd5f1978ef15b3ece3474f4372ae5fe7 upstream.
+
+Currently doesn't matter cause we allocate the fence in the
+lower 265MB anyway.
+
+Reported-by: Frank Huang <FrankR.Huang@amd.com>
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/r600.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/r600.c
++++ b/drivers/gpu/drm/radeon/r600.c
+@@ -2986,7 +2986,7 @@ void r600_uvd_fence_emit(struct radeon_d
+ struct radeon_fence *fence)
+ {
+ struct radeon_ring *ring = &rdev->ring[fence->ring];
+- uint32_t addr = rdev->fence_drv[fence->ring].gpu_addr;
++ uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;
+
+ radeon_ring_write(ring, PACKET0(UVD_CONTEXT_ID, 0));
+ radeon_ring_write(ring, fence->seq);
--- /dev/null
+From c2b4cacfe9816c1fe378c785ce8a678cf0635ec6 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 8 Jul 2013 18:16:56 -0400
+Subject: drm/radeon/hdmi: make sure we have an afmt block assigned
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit c2b4cacfe9816c1fe378c785ce8a678cf0635ec6 upstream.
+
+Prevents a segfault if an afmt block is not assigned to the
+encoder such as in the LVDS or eDP case.
+
+Fixes:
+https://bugs.freedesktop.org/show_bug.cgi?id=66714
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/evergreen_hdmi.c | 6 ++++++
+ drivers/gpu/drm/radeon/r600_hdmi.c | 6 ++++++
+ 2 files changed, 12 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
++++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
+@@ -177,6 +177,9 @@ void evergreen_hdmi_setmode(struct drm_e
+ uint32_t offset;
+ ssize_t err;
+
++ if (!dig || !dig->afmt)
++ return;
++
+ /* Silent, r600_hdmi_enable will raise WARN for us */
+ if (!dig->afmt->enabled)
+ return;
+@@ -280,6 +283,9 @@ void evergreen_hdmi_enable(struct drm_en
+ struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+ struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+
++ if (!dig || !dig->afmt)
++ return;
++
+ /* Silent, r600_hdmi_enable will raise WARN for us */
+ if (enable && dig->afmt->enabled)
+ return;
+--- a/drivers/gpu/drm/radeon/r600_hdmi.c
++++ b/drivers/gpu/drm/radeon/r600_hdmi.c
+@@ -266,6 +266,9 @@ void r600_hdmi_setmode(struct drm_encode
+ uint32_t offset;
+ ssize_t err;
+
++ if (!dig || !dig->afmt)
++ return;
++
+ /* Silent, r600_hdmi_enable will raise WARN for us */
+ if (!dig->afmt->enabled)
+ return;
+@@ -448,6 +451,9 @@ void r600_hdmi_enable(struct drm_encoder
+ struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+ u32 hdmi = HDMI0_ERROR_ACK;
+
++ if (!dig || !dig->afmt)
++ return;
++
+ /* Silent, r600_hdmi_enable will raise WARN for us */
+ if (enable && dig->afmt->enabled)
+ return;
--- /dev/null
+From 03ed8cf9b28d886c64c7e705c7bb1a365fd8fb95 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 19 Jul 2013 17:44:43 -0400
+Subject: drm/radeon: improve dac adjust heuristics for legacy pdac
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 03ed8cf9b28d886c64c7e705c7bb1a365fd8fb95 upstream.
+
+Hopefully avoid more quirks in the future due to bogus
+vbios dac data.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_combios.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_combios.c
++++ b/drivers/gpu/drm/radeon/radeon_combios.c
+@@ -902,8 +902,10 @@ struct radeon_encoder_primary_dac *radeo
+ dac = RBIOS8(dac_info + 0x3) & 0xf;
+ p_dac->ps2_pdac_adj = (bg << 8) | (dac);
+ }
+- /* if the values are all zeros, use the table */
+- if (p_dac->ps2_pdac_adj)
++ /* if the values are zeros, use the table */
++ if ((dac == 0) || (bg == 0))
++ found = 0;
++ else
+ found = 1;
+ }
+
--- /dev/null
+From 3e3e53f86bee87bb14474213c879595605e35112 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Thu, 18 Jul 2013 13:11:56 -0400
+Subject: drm/radeon/vm: only align the pt base to 32k
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 3e3e53f86bee87bb14474213c879595605e35112 upstream.
+
+fixes:
+https://bugs.freedesktop.org/show_bug.cgi?id=67016
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_gart.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_gart.c
++++ b/drivers/gpu/drm/radeon/radeon_gart.c
+@@ -466,7 +466,7 @@ int radeon_vm_manager_init(struct radeon
+ size += rdev->vm_manager.max_pfn * 8;
+ size *= 2;
+ r = radeon_sa_bo_manager_init(rdev, &rdev->vm_manager.sa_manager,
+- RADEON_VM_PTB_ALIGN(size),
++ RADEON_GPU_PAGE_ALIGN(size),
+ RADEON_VM_PTB_ALIGN_SIZE,
+ RADEON_GEM_DOMAIN_VRAM);
+ if (r) {
+@@ -621,7 +621,7 @@ int radeon_vm_alloc_pt(struct radeon_dev
+ }
+
+ retry:
+- pd_size = RADEON_VM_PTB_ALIGN(radeon_vm_directory_size(rdev));
++ pd_size = radeon_vm_directory_size(rdev);
+ r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
+ &vm->page_directory, pd_size,
+ RADEON_VM_PTB_ALIGN_SIZE, false);
+@@ -953,8 +953,8 @@ static int radeon_vm_update_pdes(struct
+ retry:
+ r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
+ &vm->page_tables[pt_idx],
+- RADEON_VM_PTB_ALIGN(RADEON_VM_PTE_COUNT * 8),
+- RADEON_VM_PTB_ALIGN_SIZE, false);
++ RADEON_VM_PTE_COUNT * 8,
++ RADEON_GPU_PAGE_SIZE, false);
+
+ if (r == -ENOMEM) {
+ r = radeon_vm_evict(rdev, vm);
dm-mpath-fix-ioctl-deadlock-when-no-paths.patch
dm-ioctl-set-noio-flag-to-avoid-__vmalloc-deadlock.patch
dm-verity-fix-inability-to-use-a-few-specific-devices-sizes.patch
+drm-radeon-hdmi-make-sure-we-have-an-afmt-block-assigned.patch
+drm-radeon-fix-uvd-fence-emit.patch
+drm-radeon-allow-selection-of-alignment-in-the-sub-allocator.patch
+drm-radeon-align-vm-ptbs-page-table-blocks-to-32k.patch
+drm-radeon-vm-only-align-the-pt-base-to-32k.patch
+drm-radeon-fix-endian-issues-with-dp-handling-v3.patch
+drm-radeon-another-card-with-wrong-primary-dac-adj.patch
+drm-radeon-fix-combios-tables-on-older-cards.patch
+drm-radeon-improve-dac-adjust-heuristics-for-legacy-pdac.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
