Merge tag 'renesas-clk-for-v6.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel...

Pull Renesas clk driver updates from Geert Uytterhoeven:

 - Various fixes for the module reset procedure on R-Car Gen4 SoCs
 - Add ADC and thermal (TSU) clocks on RZ/T2H and RZ/N2H
 - Add USB clocks and resets on RZ/G3E
 - Add ISP and display (DSI, LCDC) clocks and resets on RZ/V2H and RZ/V2N
 - Add thermal (TSU) and RTC clocks and resets on RZ/V2H
 - Add reset support on RZ/T2H and RZ/N2H
 - Fix the module stop disable procedure on RZ/T2H and RZ/N2H
 - Add camera (CRU) clocks and resets on RZ/V2N

* tag 'renesas-clk-for-v6.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (21 commits)
  clk: renesas: r9a09g056: Add clock and reset entries for ISP
  clk: renesas: r9a09g056: Add support for PLLVDO, CRU clocks, and resets
  clk: renesas: r9a09g056: Add clocks and resets for DSI and LCDC modules
  clk: renesas: r9a09g077: Add TSU module clock
  clk: renesas: r9a09g057: Add clock and reset entries for DSI and LCDC
  clk: renesas: rzv2h: Add support for DSI clocks
  clk: renesas: rzv2h: Use GENMASK for PLL fields
  clk: renesas: rzv2h: Add instance field to struct pll
  clk: renesas: r9a09g057: Add clock and reset entries for RTC
  clk: renesas: cpg-mssr: Spelling s/offets/offsets/
  clk: renesas: r9a09g057: Add clock and reset entries for TSU
  clk: renesas: cpg-mssr: Add read-back and delay handling for RZ/T2H MSTP
  clk: renesas: cpg-mssr: Add module reset support for RZ/T2H
  clk: renesas: r9a09g057: Add clock and reset entries for ISP
  clk: renesas: r9a09g047: Add clock and reset entries for USB2
  clk: renesas: Use IS_ERR() for pointers that cannot be NULL
  dt-bindings: clock: renesas,r9a09g047-cpg: Add USB2 PHY core clocks
  clk: renesas: cpg-lib: Remove unneeded semicolon
  clk: renesas: r9a09g077: Add ADC module clocks
  clk: renesas: cpg-mssr: Read back reset registers to assure values latched
  ...