--- /dev/null
+From 71c751f2a43fa03fae3cf5f0067ed3001a397013 Mon Sep 17 00:00:00 2001
+From: Mark Rutland <mark.rutland@arm.com>
+Date: Mon, 23 Apr 2018 11:41:33 +0100
+Subject: arm64: add sentinel to kpti_safe_list
+
+From: Mark Rutland <mark.rutland@arm.com>
+
+commit 71c751f2a43fa03fae3cf5f0067ed3001a397013 upstream.
+
+We're missing a sentinel entry in kpti_safe_list. Thus is_midr_in_range_list()
+can walk past the end of kpti_safe_list. Depending on the contents of memory,
+this could erroneously match a CPU's MIDR, cause a data abort, or other bad
+outcomes.
+
+Add the sentinel entry to avoid this.
+
+Fixes: be5b299830c63ed7 ("arm64: capabilities: Add support for checks based on a list of MIDRs")
+Signed-off-by: Mark Rutland <mark.rutland@arm.com>
+Reported-by: Jan Kiszka <jan.kiszka@siemens.com>
+Tested-by: Jan Kiszka <jan.kiszka@siemens.com>
+Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
+Cc: Catalin Marinas <catalin.marinas@arm.com>
+Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
+Cc: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Juerg Haefliger <juergh@canonical.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/kernel/cpufeature.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm64/kernel/cpufeature.c
++++ b/arch/arm64/kernel/cpufeature.c
+@@ -836,6 +836,7 @@ static bool unmap_kernel_at_el0(const st
+ MIDR_ALL_VERSIONS(MIDR_CORTEX_A57),
+ MIDR_ALL_VERSIONS(MIDR_CORTEX_A72),
+ MIDR_ALL_VERSIONS(MIDR_CORTEX_A73),
++ { /* sentinel */ }
+ };
+ char const *str = "kpti command line option";
+ bool meltdown_safe;
--- /dev/null
+From dc0e36581eb2da1aa3c63ceeff0f10ef1e899b2a Mon Sep 17 00:00:00 2001
+From: Dirk Mueller <dmueller@suse.com>
+Date: Wed, 25 Jul 2018 13:10:28 +0200
+Subject: arm64: Check for errata before evaluating cpu features
+
+From: Dirk Mueller <dmueller@suse.com>
+
+commit dc0e36581eb2da1aa3c63ceeff0f10ef1e899b2a upstream.
+
+Since commit d3aec8a28be3b8 ("arm64: capabilities: Restrict KPTI
+detection to boot-time CPUs") we rely on errata flags being already
+populated during feature enumeration. The order of errata and
+features was flipped as part of commit ed478b3f9e4a ("arm64:
+capabilities: Group handling of features and errata workarounds").
+
+Return to the orginal order of errata and feature evaluation to
+ensure errata flags are present during feature evaluation.
+
+Fixes: ed478b3f9e4a ("arm64: capabilities: Group handling of
+ features and errata workarounds")
+CC: Suzuki K Poulose <suzuki.poulose@arm.com>
+CC: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Dirk Mueller <dmueller@suse.com>
+Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Juerg Haefliger <juergh@canonical.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm64/kernel/cpufeature.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/kernel/cpufeature.c
++++ b/arch/arm64/kernel/cpufeature.c
+@@ -1278,9 +1278,9 @@ static void __update_cpu_capabilities(co
+
+ static void update_cpu_capabilities(u16 scope_mask)
+ {
+- __update_cpu_capabilities(arm64_features, scope_mask, "detected:");
+ __update_cpu_capabilities(arm64_errata, scope_mask,
+ "enabling workaround for");
++ __update_cpu_capabilities(arm64_features, scope_mask, "detected:");
+ }
+
+ static int __enable_cpu_capability(void *arg)
+@@ -1335,8 +1335,8 @@ __enable_cpu_capabilities(const struct a
+
+ static void __init enable_cpu_capabilities(u16 scope_mask)
+ {
+- __enable_cpu_capabilities(arm64_features, scope_mask);
+ __enable_cpu_capabilities(arm64_errata, scope_mask);
++ __enable_cpu_capabilities(arm64_features, scope_mask);
+ }
+
+ /*
--- /dev/null
+From 9cf35f673583ccc9f3e2507498b3079d56614ad3 Mon Sep 17 00:00:00 2001
+From: Goldwyn Rodrigues <rgoldwyn@suse.com>
+Date: Wed, 11 Sep 2019 11:45:15 -0500
+Subject: btrfs: simplify inode locking for RWF_NOWAIT
+
+From: Goldwyn Rodrigues <rgoldwyn@suse.com>
+
+commit 9cf35f673583ccc9f3e2507498b3079d56614ad3 upstream.
+
+This is similar to 942491c9e6d6 ("xfs: fix AIM7 regression"). Apparently
+our current rwsem code doesn't like doing the trylock, then lock for
+real scheme. This causes extra contention on the lock and can be
+measured eg. by AIM7 benchmark. So change our read/write methods to
+just do the trylock for the RWF_NOWAIT case.
+
+Fixes: edf064e7c6fe ("btrfs: nowait aio support")
+Signed-off-by: Goldwyn Rodrigues <rgoldwyn@suse.com>
+Reviewed-by: David Sterba <dsterba@suse.com>
+[ update changelog ]
+Signed-off-by: David Sterba <dsterba@suse.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ fs/btrfs/file.c | 5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+--- a/fs/btrfs/file.c
++++ b/fs/btrfs/file.c
+@@ -1890,9 +1890,10 @@ static ssize_t btrfs_file_write_iter(str
+ (iocb->ki_flags & IOCB_NOWAIT))
+ return -EOPNOTSUPP;
+
+- if (!inode_trylock(inode)) {
+- if (iocb->ki_flags & IOCB_NOWAIT)
++ if (iocb->ki_flags & IOCB_NOWAIT) {
++ if (!inode_trylock(inode))
+ return -EAGAIN;
++ } else {
+ inode_lock(inode);
+ }
+
--- /dev/null
+From 546d30099ed204792083f043cd7e016de86016a3 Mon Sep 17 00:00:00 2001
+From: Leon Romanovsky <leon@kernel.org>
+Date: Tue, 29 Oct 2019 07:57:21 +0200
+Subject: RDMA/mlx5: Return proper error value
+
+From: Leon Romanovsky <leonro@mellanox.com>
+
+commit 546d30099ed204792083f043cd7e016de86016a3 upstream.
+
+Returned value from mlx5_mr_cache_alloc() is checked to be error or real
+pointer. Return proper error code instead of NULL which is not checked
+later.
+
+Fixes: 81713d3788d2 ("IB/mlx5: Add implicit MR support")
+Link: https://lore.kernel.org/r/20191029055721.7192-1-leon@kernel.org
+Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
+Reviewed-by: Jason Gunthorpe <jgg@mellanox.com>
+Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/infiniband/hw/mlx5/mr.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/infiniband/hw/mlx5/mr.c
++++ b/drivers/infiniband/hw/mlx5/mr.c
+@@ -460,7 +460,7 @@ struct mlx5_ib_mr *mlx5_mr_cache_alloc(s
+
+ if (entry < 0 || entry >= MAX_MR_CACHE_ENTRIES) {
+ mlx5_ib_err(dev, "cache entry %d is out of range\n", entry);
+- return NULL;
++ return ERR_PTR(-EINVAL);
+ }
+
+ ent = &cache->ent[entry];
--- /dev/null
+From e88982ad1bb12db699de96fbc07096359ef6176c Mon Sep 17 00:00:00 2001
+From: Bart Van Assche <bvanassche@acm.org>
+Date: Tue, 5 Nov 2019 13:46:32 -0800
+Subject: RDMA/srpt: Report the SCSI residual to the initiator
+
+From: Bart Van Assche <bvanassche@acm.org>
+
+commit e88982ad1bb12db699de96fbc07096359ef6176c upstream.
+
+The code added by this patch is similar to the code that already exists in
+ibmvscsis_determine_resid(). This patch has been tested by running the
+following command:
+
+strace sg_raw -r 1k /dev/sdb 12 00 00 00 60 00 -o inquiry.bin |&
+ grep resid=
+
+Link: https://lore.kernel.org/r/20191105214632.183302-1-bvanassche@acm.org
+Fixes: a42d985bd5b2 ("ib_srpt: Initial SRP Target merge for v3.3-rc1")
+Signed-off-by: Bart Van Assche <bvanassche@acm.org>
+Acked-by: Honggang Li <honli@redhat.com>
+Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/infiniband/ulp/srpt/ib_srpt.c | 24 ++++++++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+--- a/drivers/infiniband/ulp/srpt/ib_srpt.c
++++ b/drivers/infiniband/ulp/srpt/ib_srpt.c
+@@ -1246,9 +1246,11 @@ static int srpt_build_cmd_rsp(struct srp
+ struct srpt_send_ioctx *ioctx, u64 tag,
+ int status)
+ {
++ struct se_cmd *cmd = &ioctx->cmd;
+ struct srp_rsp *srp_rsp;
+ const u8 *sense_data;
+ int sense_data_len, max_sense_len;
++ u32 resid = cmd->residual_count;
+
+ /*
+ * The lowest bit of all SAM-3 status codes is zero (see also
+@@ -1270,6 +1272,28 @@ static int srpt_build_cmd_rsp(struct srp
+ srp_rsp->tag = tag;
+ srp_rsp->status = status;
+
++ if (cmd->se_cmd_flags & SCF_UNDERFLOW_BIT) {
++ if (cmd->data_direction == DMA_TO_DEVICE) {
++ /* residual data from an underflow write */
++ srp_rsp->flags = SRP_RSP_FLAG_DOUNDER;
++ srp_rsp->data_out_res_cnt = cpu_to_be32(resid);
++ } else if (cmd->data_direction == DMA_FROM_DEVICE) {
++ /* residual data from an underflow read */
++ srp_rsp->flags = SRP_RSP_FLAG_DIUNDER;
++ srp_rsp->data_in_res_cnt = cpu_to_be32(resid);
++ }
++ } else if (cmd->se_cmd_flags & SCF_OVERFLOW_BIT) {
++ if (cmd->data_direction == DMA_TO_DEVICE) {
++ /* residual data from an overflow write */
++ srp_rsp->flags = SRP_RSP_FLAG_DOOVER;
++ srp_rsp->data_out_res_cnt = cpu_to_be32(resid);
++ } else if (cmd->data_direction == DMA_FROM_DEVICE) {
++ /* residual data from an overflow read */
++ srp_rsp->flags = SRP_RSP_FLAG_DIOVER;
++ srp_rsp->data_in_res_cnt = cpu_to_be32(resid);
++ }
++ }
++
+ if (sense_data_len) {
+ BUILD_BUG_ON(MIN_MAX_RSP_SIZE <= sizeof(*srp_rsp));
+ max_sense_len = ch->max_ti_iu_len - sizeof(*srp_rsp);
gpio-fix-error-message-on-out-of-range-gpio-in-lookup-table.patch
hsr-reset-network-header-when-supervision-frame-is-created.patch
cifs-adjust-indentation-in-smb2_open_file.patch
+btrfs-simplify-inode-locking-for-rwf_nowait.patch
+rdma-mlx5-return-proper-error-value.patch
+rdma-srpt-report-the-scsi-residual-to-the-initiator.patch
+arm64-add-sentinel-to-kpti_safe_list.patch
+arm64-check-for-errata-before-evaluating-cpu-features.patch