configure.ac: Add GAS check for LEON instructions on SPARC.

	* configure.ac: Add GAS check for LEON instructions on SPARC.
	* configure: Regenerate.
	* config.in: Likewise.
	* config.gcc (with_cpu): Remove sparc-leon*-* and deal with LEON in the
	sparc*-*-* block.
	* config/sparc/sparc.opt (LEON, LEON3): New masks.
	* config/sparc/sparc.h (ASM_CPU32_DEFAULT_SPEC): Set to AS_LEON_FLAG
	for LEON or LEON3.
	(ASM_CPU_SPEC): Pass AS_LEON_FLAG if -mcpu=leon or -mcpu=leon3.
	(AS_LEON_FLAG): New macro.
	* config/sparc/sparc.c (sparc_option_override): Set MASK_LEON for leon
	and MASK_LEON3 for leon3 and unset them if HAVE_AS_LEON is not defined.
	Deal with LEON and LEON3 for the memory model.
	* config/sparc/sync.m (atomic_compare_and_swap<mode>): Enable for LEON3
	(atomic_compare_and_swap<mode>_1): Likewise.
	(*atomic_compare_and_swap<mode>_1): Likewise.

From-SVN: r201622

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 073b393b8f815c242be02925c7191bbfdaaedf94..b70e7fba0c3fab0c5d5f251a490c5ad7464ada74 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,22 @@
+2013-08-09  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * configure.ac: Add GAS check for LEON instructions on SPARC.
+       * configure: Regenerate.
+       * config.in: Likewise.
+       * config.gcc (with_cpu): Remove sparc-leon*-* and deal with LEON in the
+       sparc*-*-* block.
+       * config/sparc/sparc.opt (LEON, LEON3): New masks.
+       * config/sparc/sparc.h (ASM_CPU32_DEFAULT_SPEC): Set to AS_LEON_FLAG
+       for LEON or LEON3.
+       (ASM_CPU_SPEC): Pass AS_LEON_FLAG if -mcpu=leon or -mcpu=leon3.
+       (AS_LEON_FLAG): New macro.
+       * config/sparc/sparc.c (sparc_option_override): Set MASK_LEON for leon
+       and MASK_LEON3 for leon3 and unset them if HAVE_AS_LEON is not defined.
+       Deal with LEON and LEON3 for the memory model.
+       * config/sparc/sync.m (atomic_compare_and_swap<mode>): Enable for LEON3
+       (atomic_compare_and_swap<mode>_1): Likewise.
+       (*atomic_compare_and_swap<mode>_1): Likewise.
+
 2013-08-09  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
 
        * config/arm/neon.md (vcond): Fix floating-point vector
@@ -58,13 +77,13 @@
 2013-08-08  Richard Earnshaw  <rearnsha@arm.com>
 
        PR target/57431
-       * arm/neon.md (neon_vld1_dupdi): New expand pattern.
+       * config/arm/arm/neon.md (neon_vld1_dupdi): New expand pattern.
        (neon_vld1_dup<mode> VD iterator): Iterate over VD not VDX.
 
 2013-08-08  Richard Earnshaw  <rearnsha@arm.com>
 
        PR target/56979
-       * arm.c (aapcs_vfp_allocate): Decompose the argument if the
+       * config/arm/arm.c (aapcs_vfp_allocate): Decompose the argument if the
        suggested mode for the assignment isn't compatible with the
        registers required.
 

diff --git a/gcc/config.gcc b/gcc/config.gcc
index ef37e613de4f695acf27bbab0c14343e44935c08..b2565fa76640e664e813100ba5d7a5504ef40f94 100644 (file)
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -3036,11 +3036,18 @@ if test x$with_cpu = x ; then
          with_cpu=8540
       fi       
       ;;
-    sparc-leon*-*)
-      with_cpu=v8;
-      ;;
     sparc*-*-*)
-      with_cpu="`echo ${target} | sed 's/-.*$//'`"
+      case ${target} in
+       *-leon-*)
+         with_cpu=leon
+         ;;
+       *-leon[3-9]*)
+         with_cpu=leon3
+         ;;
+       *)
+         with_cpu="`echo ${target} | sed 's/-.*$//'`"
+         ;;
+      esac
       ;;
   esac
 

diff --git a/gcc/config.in b/gcc/config.in
index 25890e889ba0c7cd0ed67cfefddb8c18c3813cfc..44f9a320c275f7131d7205121b996561748fdd5b 100644 (file)
--- a/gcc/config.in
+++ b/gcc/config.in
@@ -387,6 +387,12 @@
 #endif
 
 
+/* Define if your assembler supports LEON instructions. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_AS_LEON
+#endif
+
+
 /* Define if the assembler won't complain about a line such as # 0 "" 2. */
 #ifndef USED_FOR_TARGET
 #undef HAVE_AS_LINE_ZERO

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 7080b3364a360415bab38cc800a2415da0973739..e5b4662512df293da2d5c128bc78978c1c5391c8 100644 (file)
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -1151,9 +1151,8 @@ sparc_option_override (void)
     /* TI TMS390Z55 supersparc */
     { "supersparc",    MASK_ISA, MASK_V8 },
     { "hypersparc",    MASK_ISA, MASK_V8|MASK_FPU },
-    /* LEON */
-    { "leon",          MASK_ISA, MASK_V8|MASK_FPU },
-    { "leon3",         MASK_ISA, MASK_V8|MASK_FPU },
+    { "leon",          MASK_ISA, MASK_V8|MASK_LEON|MASK_FPU },
+    { "leon3",         MASK_ISA, MASK_V8|MASK_LEON3|MASK_FPU },
     { "sparclite",     MASK_ISA, MASK_SPARCLITE },
     /* The Fujitsu MB86930 is the original sparclite chip, with no FPU.  */
     { "f930",          MASK_ISA|MASK_FPU, MASK_SPARCLITE },
@@ -1312,6 +1311,9 @@ sparc_option_override (void)
 #endif
 #ifndef HAVE_AS_SPARC4
                   & ~MASK_CBCOND
+#endif
+#ifndef HAVE_AS_LEON
+                  & ~(MASK_LEON | MASK_LEON3)
 #endif
                   );
 
@@ -1441,6 +1443,10 @@ sparc_option_override (void)
       /* Choose the most relaxed model for the processor.  */
       else if (TARGET_V9)
        sparc_memory_model = SMM_RMO;
+      else if (TARGET_LEON3)
+       sparc_memory_model = SMM_TSO;
+      else if (TARGET_LEON)
+       sparc_memory_model = SMM_SC;
       else if (TARGET_V8)
        sparc_memory_model = SMM_PSO;
       else

diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 202d23c0162187005012a09d36c6aa7225a2ecdd..d96c1b6b422b8f083c692f9eb3096e52b6cbc71e 100644 (file)
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -236,7 +236,7 @@ extern enum cmodel sparc_cmodel;
 #if TARGET_CPU_DEFAULT == TARGET_CPU_leon \
  || TARGET_CPU_DEFAULT == TARGET_CPU_leon3
 #define CPP_CPU32_DEFAULT_SPEC "-D__leon__ -D__sparc_v8__"
-#define ASM_CPU32_DEFAULT_SPEC ""
+#define ASM_CPU32_DEFAULT_SPEC AS_LEON_FLAG
 #endif
 
 #endif
@@ -332,8 +332,8 @@ extern enum cmodel sparc_cmodel;
 %{mcpu=v8:-Av8} \
 %{mcpu=supersparc:-Av8} \
 %{mcpu=hypersparc:-Av8} \
-%{mcpu=leon:-Av8} \
-%{mcpu=leon3:-Av8} \
+%{mcpu=leon:" AS_LEON_FLAG "} \
+%{mcpu=leon3:" AS_LEON_FLAG "} \
 %{mv8plus:-Av8plus} \
 %{mcpu=v9:-Av9} \
 %{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \
@@ -1758,6 +1758,12 @@ extern int sparc_indent_opcode;
 #define AS_NIAGARA4_FLAG "-Av9" AS_NIAGARA3_FLAG
 #endif
 
+#ifdef HAVE_AS_LEON
+#define AS_LEON_FLAG "-Aleon"
+#else
+#define AS_LEON_FLAG "-Av8"
+#endif
+
 /* We use gcc _mcount for profiling.  */
 #define NO_PROFILE_COUNTERS 0
 

diff --git a/gcc/config/sparc/sparc.opt b/gcc/config/sparc/sparc.opt
index 016e69974224a586501f1b38db39848f6182a3b8..3ccd54fa463d9d877bb223c45a34f6f839be1f06 100644 (file)
--- a/gcc/config/sparc/sparc.opt
+++ b/gcc/config/sparc/sparc.opt
@@ -211,6 +211,12 @@ Enable workarounds for the errata of the UT699 processor
 Mask(LONG_DOUBLE_128)
 ;; Use 128-bit long double
 
+Mask(LEON)
+;; Generate code for LEON
+
+Mask(LEON3)
+;; Generate code for LEON3
+
 Mask(SPARCLITE)
 ;; Generate code for SPARClite
 

diff --git a/gcc/config/sparc/sync.md b/gcc/config/sparc/sync.md
index 2f21f812dc9a2fbf2becd7c4260fbf8007333785..130f52191946d52b7175ee48cb5e03f09d11ba41 100644 (file)
--- a/gcc/config/sparc/sync.md
+++ b/gcc/config/sparc/sync.md
@@ -161,7 +161,8 @@
    (match_operand:SI 5 "const_int_operand" "")         ;; is_weak
    (match_operand:SI 6 "const_int_operand" "")         ;; mod_s
    (match_operand:SI 7 "const_int_operand" "")]                ;; mod_f
-  "TARGET_V9 && (<MODE>mode != DImode || TARGET_ARCH64 || TARGET_V8PLUS)"
+  "(TARGET_V9 || TARGET_LEON3)
+   && (<MODE>mode != DImode || TARGET_ARCH64 || TARGET_V8PLUS)"
 {
   sparc_expand_compare_and_swap (operands);
   DONE;
@@ -176,7 +177,7 @@
             [(match_operand:I48MODE 2 "register_operand" "")
              (match_operand:I48MODE 3 "register_operand" "")]
             UNSPECV_CAS))])]
-  "TARGET_V9"
+  "TARGET_V9 || TARGET_LEON3"
   "")
 
 (define_insn "*atomic_compare_and_swap<mode>_1"
@@ -187,7 +188,7 @@
          [(match_operand:I48MODE 2 "register_operand" "r")
           (match_operand:I48MODE 3 "register_operand" "0")]
          UNSPECV_CAS))]
-  "TARGET_V9 && (<MODE>mode == SImode || TARGET_ARCH64)"
+  "(TARGET_V9 || TARGET_LEON3) && (<MODE>mode != DImode || TARGET_ARCH64)"
   "cas<modesuffix>\t%1, %2, %0"
   [(set_attr "type" "multi")])
 

diff --git a/gcc/configure b/gcc/configure
index 0d6ddaad4f313b1a061f933390ddeda87445e16e..1e9be8e9fe70134016a97daed63d2e5bc36a7097 100755 (executable)
--- a/gcc/configure
+++ b/gcc/configure
@@ -24331,6 +24331,43 @@ if test $gcc_cv_as_sparc_sparc4 = yes; then
 
 $as_echo "#define HAVE_AS_SPARC4 1" >>confdefs.h
 
+fi
+
+    { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for LEON instructions" >&5
+$as_echo_n "checking assembler for LEON instructions... " >&6; }
+if test "${gcc_cv_as_sparc_leon+set}" = set; then :
+  $as_echo_n "(cached) " >&6
+else
+  gcc_cv_as_sparc_leon=no
+  if test x$gcc_cv_as != x; then
+    $as_echo '.text
+       .register %g2, #scratch
+       .register %g3, #scratch
+       .align 4
+       smac %g2, %g3, %g1
+       umac %g2, %g3, %g1
+       cas [%g2], %g3, %g1' > conftest.s
+    if { ac_try='$gcc_cv_as $gcc_cv_as_flags -Aleon -o conftest.o conftest.s >&5'
+  { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+  (eval $ac_try) 2>&5
+  ac_status=$?
+  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }; }
+    then
+       gcc_cv_as_sparc_leon=yes
+    else
+      echo "configure: failed program was" >&5
+      cat conftest.s >&5
+    fi
+    rm -f conftest.o conftest.s
+  fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_sparc_leon" >&5
+$as_echo "$gcc_cv_as_sparc_leon" >&6; }
+if test $gcc_cv_as_sparc_leon = yes; then
+
+$as_echo "#define HAVE_AS_LEON 1" >>confdefs.h
+
 fi
     ;;
 

diff --git a/gcc/configure.ac b/gcc/configure.ac
index b279373410a401c137409ae75f648759e3eb34c8..116ba133145aeb9805d2922e2778898412279122 100644 (file)
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -3613,6 +3613,19 @@ foo:
        kasumi_fi_xor %f46, %f48, %f50, %f52],,
       [AC_DEFINE(HAVE_AS_SPARC4, 1,
                 [Define if your assembler supports SPARC4 instructions.])])
+
+    gcc_GAS_CHECK_FEATURE([LEON instructions],
+      gcc_cv_as_sparc_leon,,
+      [-Aleon],
+      [.text
+       .register %g2, #scratch
+       .register %g3, #scratch
+       .align 4
+       smac %g2, %g3, %g1
+       umac %g2, %g3, %g1
+       cas [[%g2]], %g3, %g1],,
+      [AC_DEFINE(HAVE_AS_LEON, 1,
+                [Define if your assembler supports LEON instructions.])])
     ;;
 
 changequote(,)dnl