]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
EDAC/bluefield: Fix potential integer overflow
authorDavid Thompson <davthompson@nvidia.com>
Mon, 30 Sep 2024 15:10:56 +0000 (11:10 -0400)
committerBorislav Petkov (AMD) <bp@alien8.de>
Thu, 17 Oct 2024 12:10:18 +0000 (14:10 +0200)
The 64-bit argument for the "get DIMM info" SMC call consists of mem_ctrl_idx
left-shifted 16 bits and OR-ed with DIMM index.  With mem_ctrl_idx defined as
32-bits wide the left-shift operation truncates the upper 16 bits of
information during the calculation of the SMC argument.

The mem_ctrl_idx stack variable must be defined as 64-bits wide to prevent any
potential integer overflow, i.e. loss of data from upper 16 bits.

Fixes: 82413e562ea6 ("EDAC, mellanox: Add ECC support for BlueField DDR4")
Signed-off-by: David Thompson <davthompson@nvidia.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Shravan Kumar Ramani <shravankr@nvidia.com>
Link: https://lore.kernel.org/r/20240930151056.10158-1-davthompson@nvidia.com
drivers/edac/bluefield_edac.c

index 5b3164560648eefda1164e0d256815b2af0094bf..0e539c1073510a4c9bb205e03e738426bf2ee650 100644 (file)
@@ -180,7 +180,7 @@ static void bluefield_edac_check(struct mem_ctl_info *mci)
 static void bluefield_edac_init_dimms(struct mem_ctl_info *mci)
 {
        struct bluefield_edac_priv *priv = mci->pvt_info;
-       int mem_ctrl_idx = mci->mc_idx;
+       u64 mem_ctrl_idx = mci->mc_idx;
        struct dimm_info *dimm;
        u64 smc_info, smc_arg;
        int is_empty = 1, i;