ethernet: stmmac: dwmac-rk: Add RK3506 GMAC support

Add the needed glue blocks for the RK3506-specific setup.

The RK3506 dwmac only supports up to 100MBit with a RMII PHY,
but no RGMII.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251023111213.298860-5-heiko@sntech.de
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 643578266dfca767ca22ff7593c0a8f132f478a0..a5c7e03ebc63f10ccbd07a32a3abf14b5cf9dd4c 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -827,6 +827,69 @@ static const struct rk_gmac_ops rk3399_ops = {
        .set_speed = rk3399_set_speed,
 };
 
+#define RK3506_GRF_SOC_CON8            0x0020
+#define RK3506_GRF_SOC_CON11           0x002c
+
+#define RK3506_GMAC_RMII_MODE          GRF_BIT(1)
+
+#define RK3506_GMAC_CLK_RMII_DIV2      GRF_BIT(3)
+#define RK3506_GMAC_CLK_RMII_DIV20     GRF_CLR_BIT(3)
+
+#define RK3506_GMAC_CLK_SELECT_CRU     GRF_CLR_BIT(5)
+#define RK3506_GMAC_CLK_SELECT_IO      GRF_BIT(5)
+
+#define RK3506_GMAC_CLK_RMII_GATE      GRF_BIT(2)
+#define RK3506_GMAC_CLK_RMII_NOGATE    GRF_CLR_BIT(2)
+
+static void rk3506_set_to_rmii(struct rk_priv_data *bsp_priv)
+{
+       unsigned int id = bsp_priv->id, offset;
+
+       offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;
+       regmap_write(bsp_priv->grf, offset, RK3506_GMAC_RMII_MODE);
+}
+
+static const struct rk_reg_speed_data rk3506_reg_speed_data = {
+       .rmii_10 = RK3506_GMAC_CLK_RMII_DIV20,
+       .rmii_100 = RK3506_GMAC_CLK_RMII_DIV2,
+};
+
+static int rk3506_set_speed(struct rk_priv_data *bsp_priv,
+                           phy_interface_t interface, int speed)
+{
+       unsigned int id = bsp_priv->id, offset;
+
+       offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;
+       return rk_set_reg_speed(bsp_priv, &rk3506_reg_speed_data,
+                               offset, interface, speed);
+}
+
+static void rk3506_set_clock_selection(struct rk_priv_data *bsp_priv,
+                                      bool input, bool enable)
+{
+       unsigned int value, offset, id = bsp_priv->id;
+
+       offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;
+
+       value = input ? RK3506_GMAC_CLK_SELECT_IO :
+                       RK3506_GMAC_CLK_SELECT_CRU;
+       value |= enable ? RK3506_GMAC_CLK_RMII_NOGATE :
+                         RK3506_GMAC_CLK_RMII_GATE;
+       regmap_write(bsp_priv->grf, offset, value);
+}
+
+static const struct rk_gmac_ops rk3506_ops = {
+       .set_to_rmii = rk3506_set_to_rmii,
+       .set_speed = rk3506_set_speed,
+       .set_clock_selection = rk3506_set_clock_selection,
+       .regs_valid = true,
+       .regs = {
+               0xff4c8000, /* gmac0 */
+               0xff4d0000, /* gmac1 */
+               0x0, /* sentinel */
+       },
+};
+
 #define RK3528_VO_GRF_GMAC_CON         0x0018
 #define RK3528_VO_GRF_MACPHY_CON0      0x001c
 #define RK3528_VO_GRF_MACPHY_CON1      0x0020
@@ -1809,6 +1872,7 @@ static const struct of_device_id rk_gmac_dwmac_match[] = {
        { .compatible = "rockchip,rk3366-gmac", .data = &rk3366_ops },
        { .compatible = "rockchip,rk3368-gmac", .data = &rk3368_ops },
        { .compatible = "rockchip,rk3399-gmac", .data = &rk3399_ops },
+       { .compatible = "rockchip,rk3506-gmac", .data = &rk3506_ops },
        { .compatible = "rockchip,rk3528-gmac", .data = &rk3528_ops },
        { .compatible = "rockchip,rk3568-gmac", .data = &rk3568_ops },
        { .compatible = "rockchip,rk3576-gmac", .data = &rk3576_ops },