3.14-stable patches

added patches:
	drm-i915-avoid-div-by-zero-when-pixel_multiplier-is-zero.patch
	drm-i915-set-backlight-duty-cycle-after-backlight-enable-for-gen4.patch

diff --git a/queue-3.14/drm-i915-avoid-div-by-zero-when-pixel_multiplier-is-zero.patch b/queue-3.14/drm-i915-avoid-div-by-zero-when-pixel_multiplier-is-zero.patch
new file mode 100644 (file)
index 0000000..f689d95
--- /dev/null
+++ b/queue-3.14/drm-i915-avoid-div-by-zero-when-pixel_multiplier-is-zero.patch
@@ -0,0 +1,59 @@
+From 2b85886a5457f5c5dbcd32edbd4e6bba0f4e8678 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
+Date: Mon, 9 Jun 2014 16:20:46 +0300
+Subject: drm/i915: Avoid div-by-zero when pixel_multiplier is zero
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Ville Syrjälä <ville.syrjala@linux.intel.com>
+
+commit 2b85886a5457f5c5dbcd32edbd4e6bba0f4e8678 upstream.
+
+On certain platforms pixel_multiplier is read out in
+.get_pipe_config(), but it also gets used to calculate the
+pixel clock in intel_sdvo_get_config(). If the pipe is disable
+but some SDVO outputs are active, we may end up dividing by zero
+in intel_sdvo_get_config().
+
+To avoid the problem simply check for zero pixel_multiplier and skip
+the division. Another attempt at fixing this involved populating
+pixel_multiplier to 1 even for disabled pipes, but that triggered a
+WARN because SDVO_CMD_GET_CLOCK_RATE_MULT command failed and thus
+encoder_pixel_multiplier was left at zero and didn't match
+pipe_config->pixel_multiplier.
+
+The "divide by pixel_multiplier" operation got introduced here:
+ commit 18442d08786472c63a0a80c27f92b033dffc26de
+ Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ Date:   Fri Sep 13 16:00:08 2013 +0300
+
+    drm/i915: Fix port_clock and adjusted_mode.clock readout all over
+
+and it has caused a regression on certain machines since they would
+hit the div-by-zero during resume.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76520
+Tested-by: Tim Richardson <tim@tim-richardson.net>
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_sdvo.c |    4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/intel_sdvo.c
++++ b/drivers/gpu/drm/i915/intel_sdvo.c
+@@ -1383,7 +1383,9 @@ static void intel_sdvo_get_config(struct
+                        >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
+       }
+ 
+-      dotclock = pipe_config->port_clock / pipe_config->pixel_multiplier;
++      dotclock = pipe_config->port_clock;
++      if (pipe_config->pixel_multiplier)
++              dotclock /= pipe_config->pixel_multiplier;
+ 
+       if (HAS_PCH_SPLIT(dev))
+               ironlake_check_encoder_dotclock(pipe_config, dotclock);

diff --git a/queue-3.14/drm-i915-set-backlight-duty-cycle-after-backlight-enable-for-gen4.patch b/queue-3.14/drm-i915-set-backlight-duty-cycle-after-backlight-enable-for-gen4.patch
new file mode 100644 (file)
index 0000000..c4456e8
--- /dev/null
+++ b/queue-3.14/drm-i915-set-backlight-duty-cycle-after-backlight-enable-for-gen4.patch
@@ -0,0 +1,54 @@
+From 2e7eeeb59a92d09144fdb7d2dc1af77a10a7945b Mon Sep 17 00:00:00 2001
+From: Jani Nikula <jani.nikula@intel.com>
+Date: Mon, 9 Jun 2014 18:24:34 +0300
+Subject: drm/i915: set backlight duty cycle after backlight enable for gen4
+
+From: Jani Nikula <jani.nikula@intel.com>
+
+commit 2e7eeeb59a92d09144fdb7d2dc1af77a10a7945b upstream.
+
+For reasons I can't claim to fully understand gen4 seems to require
+backlight duty cycle setting after the backlight has been enabled, or
+else black screen follows. I don't have documentation for the correct
+sequence on gen4 either. Confirmed on Dell Latitude D630 and MacBook4,1.
+
+This fixes a regression introduced by
+commit b35684b8fa94e04f55fd38bf672b737741d2f9e2
+Author: Jani Nikula <jani.nikula@intel.com>
+Date:   Thu Nov 14 12:13:41 2013 +0200
+
+    drm/i915: do full backlight setup at enable time
+
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=75791
+Reported-and-tested-by: mcy@lm7.fr
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79423
+Reported-and-tested-by: Marc Milgram <mmilgram@redhat.com>
+Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_panel.c |    5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_panel.c
++++ b/drivers/gpu/drm/i915/intel_panel.c
+@@ -736,9 +736,6 @@ static void i965_enable_backlight(struct
+       ctl = freq << 16;
+       I915_WRITE(BLC_PWM_CTL, ctl);
+ 
+-      /* XXX: combine this into above write? */
+-      intel_panel_actually_set_backlight(connector, panel->backlight.level);
+-
+       ctl2 = BLM_PIPE(pipe);
+       if (panel->backlight.combination_mode)
+               ctl2 |= BLM_COMBINATION_MODE;
+@@ -747,6 +744,8 @@ static void i965_enable_backlight(struct
+       I915_WRITE(BLC_PWM_CTL2, ctl2);
+       POSTING_READ(BLC_PWM_CTL2);
+       I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
++
++      intel_panel_actually_set_backlight(connector, panel->backlight.level);
+ }
+ 
+ static void vlv_enable_backlight(struct intel_connector *connector)

diff --git a/queue-3.14/series b/queue-3.14/series
index 9e9f7ef623f111fbb65e40bdf7c39d6df24f409b..2b4e6418748b6fa883088c5a1e8729cac4eedb09 100644 (file)
--- a/queue-3.14/series
+++ b/queue-3.14/series
@@ -34,3 +34,5 @@ drm-radeon-dpm-fix-vddci-setup-typo-on-cayman.patch
 drm-radeon-cik-fix-typo-in-eop-packet.patch
 drm-nv50-mc-fix-kms-pageflip-events-by-reordering-irq-handling-order.patch
 drm-gk208-gr-add-missing-registers-to-grctx-init.patch
+drm-i915-avoid-div-by-zero-when-pixel_multiplier-is-zero.patch
+drm-i915-set-backlight-duty-cycle-after-backlight-enable-for-gen4.patch